Zeroing of power supply noise sensitivity for ring oscillators operating from 1 to 4 GHz. (September 2017) - Li, Chung-Yi; Wu, Bo-Xun
Abstract: A zeroing design for both positive and negative power supply noise sensitivities of the VCO to alleviate the jitter caused by the supply noise for the PLL operating over a range of 1–4 GHz is proposed and demonstrated. The design uses a polarity check module to check the noise sensitivity polarity (positive or negative) of the supply noise. Then it uses a modified delay cell for which both its VDS and VGS can be adjusted to gain the bipolarity compensation. In addition, the calibration can be activated automatically when the PLL is locked or when the operating frequency is changed.