Atomic Layer Deposition for Vertically Integrated ZnO Thin Film Transistors: Toward 3D High Packing Density Thin Film Electronics. Issue 9 (24th August 2017)

• Record Type: Journal Article
• Authors: Sisman, Zulkarneyn; Bolat, Sami; Okyay, Ali K.
• Is Part Of: Physica status solidi. Volume 14:Issue 9(2017)
• Page Start: n/a
• Page End: n/a
• Publication Date: 2017-08-24
• Subjects: 3D integration -- atomic layer deposition -- thin film transistors; Solid state physics -- Congresses; Solid state physics -- Periodicals; Solid state physics; Conference proceedings; Periodicals; 530.41
• DOI: 10.1002/pssc.201700128
• Languages: English
• ISSNs: 1862-6351

Abstract

Abstract : We report on the first demonstration of the atomic layer deposition (ALD) based three dimensional (3D) integrated ZnO thin film transistors (TFTs) on rigid substrates. Devices exhibit high on‐off ratio (∼10 6 ) and high effective mobility (∼11.8 cm 2 V −1 s −1 ). It has also been demonstrated that the steps of fabrication result in readily stable electrical characteristics in TFTs, eliminating the need for post‐production steps. These results mark the potential of our fabrication method for the semiconducting metal oxide‐based vertical‐integrated circuits requiring high packing density and high functionality. Abstract : In this work, atomic layer deposition based three dimensional integrated ZnO thin film transistors are shown. Devices exhibit good electrical performance and stability. Scanning electron microscope image of the manufactured devices are shown in the figure.