Germanium Junctions for Beyond-Si Node Using Flash Lamp Annealing (FLA). (30th May 2017)

• Record Type: Journal Article
• Authors: Tanimura, H.; Kawarazaki, H.; Fuse, K.; Abe, M.; Ito, Y.; Aoyama, T.; Kato, S.; Kobayashi, I.; Nagayama, T.; Hamamoto, N.; Sakai, S.
• Is Part Of: MRS advances. Volume 2:Number 51(2017)
• Page Start: 2921
• Page End: 2926
• Publication Date: 2017-05-30
• Subjects: ion-implantation, -- annealing, -- Ge; Electrical engineering -- Congresses; Physics -- Congresses; Materials -- Research -- Congresses; Materials science -- Congresses; 620.11
• DOI: 10.1557/adv.2017.388
• Languages: English
• ISSNs: 2059-8521

Abstract

ABSTRACT: We report on the formation of shallow junctions with high activation in both n+/p and p+/n Ge junctions using ion implantation and Flash Lamp Annealing (FLA). The shallowest junction depths (Xj) formed for the n+/p and p+/n junctions were 7.6 nm and 6.1 nm with sheet resistances (Rs) of 860 ohms/sq. and 704 ohms/sq., respectively. By reducing knocked-on oxygen during ion implantation in the n+/p junctions, Rs was decreased by between 5% and 15%. The lowest Rs observed was 235 ohms/sq. with a junction depth of 21.5 nm. Hall measurements clearly revealed that knocked-on oxygen degraded phosphorus activation (carrier concentration). In the p+/n Ge junctions, we show that ion implantation damage induced high boron activation. Using this technique, Rs can be reduced from 475 ohms/sq. to 349 ohms/sq. These results indicate that the potential for forming ultra-shallow n+/p and p+/n junctions in the nanometer range in Ge devices using FLA is very high, leading to realistic monolithically-integrated Ge CMOS devices that can take us beyond Si technology.