Linearity enhancement in the entire tuning range of CMOS OTA using a new tune compensated source degeneration technique. (August 2017) - Rezaei, Farzan
Abstract: This paper presents a tunable linear OTA based on an improved adaptive biasing of degeneration triode-mode transistor and a new technique for compensating the linearity degradation due to the tuning action. Using the adaptive biasing circuit, the degeneration resistance is modulated such that to make constant transconductance in a wide range of input voltages. As the linearity would be lost at higher values of transconductance, a tune-dependent current is injected to the adaptive biasing circuit to remove the nonlinearities of OTA's second stage. Using 1.8 V supply voltage, the proposed OTA consumes 600 μ W in which the portion of adaptive biasing and the tune compensation circuits is 37 μ W . When a 0.9 Vp-p, 10 MHz input voltage is applied to the OTA which is tuned at highest G m, HD 3 decrement due to using adaptive biasing circuit is 3.7 dB, while it reduces to 11.3 dB due to using both adaptive biasing and tune compensation circuits.