Double‐Layer‐Stacked One Diode‐One Resistive Switching Memory Crossbar Array with an Extremely High Rectification Ratio of 109. (17th May 2017)

• Record Type: Journal Article
• Authors: Yoon, Kyung Jean; Kim, Gun Hwan; Yoo, Sijung; Bae, Woorham; Yoon, Jung Ho; Park, Tae Hyung; Kwon, Dae Eun; Kwon, Yeong Jae; Kim, Hae Jin; Kim, Yu Min; Hwang, Cheol Seong
• Is Part Of: Advanced Electronic Materials. Volume 3:Number 7(2017)
• Page Start: n/a
• Page End: n/a
• Publication Date: 2017-05-17
• Subjects: 3D crossbar memory -- diode selectors -- crossbar sensing schemes -- rectifying ReRAM -- resistive switching memory; Materials -- Electric properties -- Periodicals; Materials science -- Periodicals; Magnetic materials -- Periodicals; Electronic apparatus and appliances -- Periodicals; 537
• DOI: 10.1002/aelm.201700152
• Languages: English
• ISSNs: 2199-160X

Abstract

Abstract : A double‐layer‐stacked 1 diode‐1 resistor (1D1R) cross‐bar array (CBA) resistance switching random access memory is fabricated. The TiO2 ‐based Schottky diode and the unipolar resistance switching TiO2 comprise the cell selector and nonvolatile memory components, respectively. All the fabrication processes are performed near room temperature through physical vapor deposition processes, and the performance degradation by the thermal budget is well suppressed. As a result, a rectification ratio as high as 1.4 × 10 9 is achieved from the appropriately cycled diode, which can last up to 10 8 cycles in the integrated structure. Such highly promising performance is confirmed from both the upper and lower memory layers, which confirm the possible route for the multistacked memory structure. The two‐bit‐per‐cell operation allows an effective minimum cell area of F 2, which is confirmed from the randomly accessed cells to be completely free from adverse interference through the adoption of an extremely‐high‐performance diode. The present 1D1R integration technique will eventually allow the fabrication of an extremely high‐integration‐density (above 1 Gb per block) CBA with the help of the two‐port sensing scheme. Such a high‐performance CBA device is a feasible contender for memory‐dominant computation. Abstract : A F 2 ‐cell sized (F: feature size) double‐layer resistive‐switching random access memory (ReRAM) crossbar array is demonstrated. A diode with a rectification ratio of over 10 9 and a cycle endurance of over 10 8 shows excellent performance as a cell selector. Comprehensive examination provides a high feasibility of the present array for ultrahigh‐density ReRAM integration. A novel sensing scheme further enhances its feasibility.