A Review on Circuit Simulation Techniques of Single-Event Transients and their Propagation in Delay Locked Loop. Issue 3 (4th May 2017)

• Record Type: Journal Article
• Authors: Pasupathy, K. R.; Bindu, B.
• Is Part Of: IETE technical review. Volume 34:Issue 3(2017)
• Page Start: 276
• Page End: 285
• Publication Date: 2017-05-04
• Subjects: Circuit simulation -- DLL -- Radiation -- Single-event Transient -- TCAD -- VCDL; Telecommunication -- Periodicals; Electronics -- Periodicals; Electronics; Telecommunication; Periodicals; 621.38
• DOI: 10.1080/02564602.2016.1184106
• Languages: English
• ISSNs: 0256-4602

Abstract

ABSTRACT: Electronic circuits operated in radiation environment such as space are adversely affected by the ionizing radiation. The effects include generating a transient current, altering threshold voltage and other device characteristics, and lattice damage. Of these, transient current can result in immediate change in device/circuit behaviour resulting in malfunction. This will be recoverable based on the energy and type of the ion. Thus, a better understanding of single-event effects is very important to operate the electronic circuits in the radiation environment. This paper reviews the existing methodologies to simulate the propagation of single-event transient (SET) in digital circuits and their shortcomings. An improved simulation methodology which can reproduce even the tail portion of the SET current as observed in three-dimensional technology computer aided design (TCAD) mixed-mode simulations is also proposed in this paper. This is obtained by modifying an existing simulation technique based on switch and resistor using varying resistance. The proposed technique is simple and easy to implement the SET propagation in any circuit simulator. After integrating this proposed simulation technique in circuit simulator SPECTRE, the propagation of SET, and its effects in delay locked loop (DLL) are analysed. The strike of SET in voltage-controlled delay line (VCDL) results in duty cycle error and missing clock pulse error at the DLL output. Also, the results show that the first few stages of the VCDL are more vulnerable than the rest for LETs (linear energy transfer) more than 60 MeV-cm 2 /mg. For LETs less than 60 MeV-cm 2 /mg, last delay stage has more vulnerability.