High Performance Multi-Operand Adder for Medical Images. Issue 2 (3rd April 2017)

• Record Type: Journal Article
• Authors: Nallathambi, Bharathiraja; Karthigaikumar, P; Paul, Anand
• Is Part Of: Intelligent automation & soft computing. Volume 23:Issue 2(2017)
• Page Start: 345
• Page End: 349
• Publication Date: 2017-04-03
• Subjects: Internet of Things -- FPGA -- security -- adder -- multiplier; Artificial intelligence -- Periodicals; Intelligent control systems -- Periodicals; 003.5
• DOI: 10.1080/10798587.2016.1231475
• Languages: English
• ISSNs: 1079-8587

Abstract

Abstract: The Internet of Things (IoT) gives a new path for future Internet through which it had boosted the growth in number of devices ranging from home automation to medical devices. Security in IoT is a research topic, which involves security for low memory footprint devices. Hence light weighted cryptographic algorithms plays a major role in providing data integrity for IoT devices. The term light weightiness begins from gate level to system level. Multi-operand addition, which is widely used in block ciphers and hash functions. This work presents different approaches for realization of highly efficient multi-operand addition for medical IoT field devices. The use of conventional adders in the multipliers for summation of the intermediate results leads to area and delay overhead. Multi-operand addition and compressor trees can be used more efficiently for decimal operations, which will reduce the delay without much overhead in area. The proposed approach is experimented with different multipliers for intermediate product summation, which shows the considerable amount of delay without much compromising the area. The proposed work is implemented on Nexys 2 FPGA Development board (Xilinx Spartan 3E - 500 FG 320) along with MATLAB using FPGA in loop concept and the results are compared along with medical image application.