7‐1: Invited Paper: Application of Low‐Frequency Clock Signals to Gate Driver Circuits. Issue 1 (May 2017)

• Record Type: Journal Article
• Authors: Lin, Chih-Lung; Cheng, Mao-Hsun
• Is Part Of: Digest of technical papers. Volume 48:Issue 1(2017)
• Page Start: 64
• Page End: 67
• Publication Date: 2017-05
• Subjects: Gate driver circuit -- power consumption -- thin-film transistors; Information display systems -- Congresses; 621.3815422
• DOI: 10.1002/sdtp.11559
• Languages: English
• ISSNs: 0097-966X

Abstract

Abstract : This paper collates design concepts of low‐power gate driver circuits, and our related work is reviewed. Many approaches to power consumption amelioration have been developed and focus on different parts of circuit structures. Recently, low‐frequency clock signals are adopted to further reduce both power consumption and thin‐film transistor (TFT) threshold voltage shifts (ΔVTH ).