Towards real-time crops surveillance for disease classification: exploiting parallelism in computer vision. (April 2017)

• Record Type: Journal Article
• Authors: Akram, Tallha; Naqvi, Syed Rameez; Haider, Sajjad Ali; Kamran, Muhammad
• Is Part Of: Computers & electrical engineering. Volume 59(2017)
• Page Start: 15
• Page End: 26
• Publication Date: 2017-04
• Subjects: Plant diseases -- Object of interest detection -- Features extraction -- Parallel processing -- Asynchronous -- Systems-on-chip -- Networks-on-chip; Computer engineering -- Periodicals; Electrical engineering -- Periodicals; Electrical engineering -- Data processing -- Periodicals; Ordinateurs -- Conception et construction -- Périodiques; Électrotechnique -- Périodiques; Électrotechnique -- Informatique -- Périodiques; Computer engineering; Electrical engineering; Electrical engineering -- Data processing; Periodicals; Electronic journals; 621.302854
• DOI: 10.1016/j.compeleceng.2017.02.020
• Languages: English
• ISSNs: 0045-7906

Abstract

Highlights: A real-time embedded vision system capable of classifying plant diseases is proposed. Our novel image processing algorithm transforms the image into three colorspaces, and executes in a series of steps, including contrast stretching, feature vector construction, and identification of salient regions. We have also proposed an asynchronous On-Chip communication architecture that allows efficient interconnection between the three digital signal processing cores, each processing its own colorspace. The architecture has been synthesized for 90nm process. We demonstrate that our algorithm outperforms few existing works in literature in terms of accuracy and computation time. Graphical abstract: Abstract: Considering the incessantly increasing economic losses due to plant diseases in the agricultural sector, we have designed a real-time system capable of classifying plant diseases. In this context, we have proposed an image processing algorithm that transforms the image into three colorspaces, which are processed simultaneously. The algorithm executes in a series of intermediate steps, including contrast stretching, feature vector construction, and identification of salient regions. To enable effective execution, we have also proposed the underlying On-Chip communication architecture that allows efficient interconnection between the three digital signal processing cores, each processing its own colorspace. The architecture has been synthesized for 90 nm process, as well as on an FPGA, achieving a post-layout operational frequency of 644 MHz, and an area of 1208.9 µm 2 on the die. We demonstrate that our system outperforms few existing works in literature in terms of accuracy and computation time.