16‐2: Cost‐effective Driver IC Architecture using Low‐power Memory Interface for Mobile Display Application. Issue 1 (May 2017) - Hwang, Moon-Sang; Choe, Deok-Jun; Kim, Do-Wan; Park, Joon-Bae; Bae, Jun-Woo; Choe, Won-jun; Kwag, Jin Oh
Abstract : Cost‐effective Display Driver IC architecture with an external memory is presented. Low‐power and high‐speed memory interface is proposed to minimize the increase of power consumption and the number of pins. The measured power consumption was less than 45mW with four 1.6Gbps data lanes, 1 clock lane and 1 command lane.