Design and analysis of a hard real‐time garbage collector for a Java chip multi‐processor. (17th September 2012)

• Record Type: Journal Article
• Authors: Puffitsch, Wolfgang
• Other Names: Ravn Anders P. guestEditor.; Higuera‐Toledano M. Teresa guestEditor.; Porto Fabio guestEditor.; Schulze Bruno guestEditor.
• Is Part Of: Concurrency and computation. Volume 25:Number 16(2013:Nov.)
• Page Start: 2269
• Page End: 2289
• Publication Date: 2012-09-17
• Subjects: garbage collection -- real‐time -- Java -- multi‐processor; Parallel processing (Electronic computers) -- Periodicals; Parallel computers -- Periodicals; 004.35
• DOI: 10.1002/cpe.2921
• Languages: English
• ISSNs: 1532-0626

Abstract

SUMMARY: Garbage collection is a well‐known technique to increase program safety and developer productivity. Within the past few years, it has also become feasible for uniprocessor hard real‐time systems. However, garbage collection for multi‐processors does not yet meet the requirements of hard real‐time systems. In this paper, we present a hard real‐time garbage collector for a Java chip multi‐processor that provides non‐disruptive and analyzable behavior. For retrieving the references in local variables of threads, we propose a protocol that minimizes disruptions for high‐priority tasks while still providing good bounds on the time until stack scanning finishes. Also, we developed a hardware unit that enables transparent, preemptible copying of objects, which eliminates the need to block tasks while copying objects. Evaluation of the hardware shows that the copy unit introduces only little overhead and does not limit the critical path. Analyses for different aspects of the system are presented, which indicate that comprehensive analysis of the presented system is indeed possible. Measurements resulted in release jitter for high‐priority tasks of 362 μ s or less on an embedded multi‐processor with eight cores clocked at 100 MHz. This indicates that with the proposed garbage collector, high scheduling quality and garbage collection do not contradict each other on chip multi‐processors. Copyright © 2012 John Wiley & Sons, Ltd.