Cite
HARVARD Citation
Johannah, J. et al. (2017). Standby and dynamic power minimization using enhanced hybrid power gating structure for deep-submicron CMOS VLSI. Microelectronics journal. pp. 137-145. [Online].
This is an interim version of our Electronic Legal Deposit Catalogue-eJournals and eBooks while we continue to recover from a cyber-attack.
Johannah, J. et al. (2017). Standby and dynamic power minimization using enhanced hybrid power gating structure for deep-submicron CMOS VLSI. Microelectronics journal. pp. 137-145. [Online].