4th order capacitively-coupled LC-based ΣΔ modulator. (April 2017)

• Record Type: Journal Article
• Authors: Belfort, Diomadson R.; Catunda, Sebastian Y.C.; Aboushady, Hassan
• Is Part Of: Microelectronics journal. Volume 62(2017)
• Page Start: 99
• Page End: 107
• Publication Date: 2017-04
• Subjects: ΣΔ -- LC Filter -- Capacitively Coupled -- Active filters -- Analog-digital conversion -- Analog circuits -- Bistable circuits -- Latches -- Feedback circuits; Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2017.02.012
• Languages: English
• ISSNs: 0959-8324

Abstract

Abstract: In this paper, we present the design and implementation of an RF bandpass Σ Δ modulator where the loop filter is a 4th order capacitively-coupled LC filter. A design methodology using coupling capacitor and the feedback Finite Impulse Response Digital-to-Analog Converter (FIRDAC) coefficients in order to obtain the desired Noise Transfer Function (NTF) is presented. The proposed capacitively-coupled bandpass LC Σ Δ is implemented in a 130 nm CMOS process. The fabricated chip, operating under a supply voltage of 1.2 V, has a varying center frequency range of 400–442 MHz with a corresponding sampling frequency range of 533–589 MHz. A maximum Signal-to-Noise Ratio (SNR) of 50 dB in a 4.5 MHz bandwidth for a power consumption of 20 mW was achieved. The effect of the clock jitter on the Analog-to-Digital Converter (ADC) performance is measured and presented.