Configurable and scalable class of high performance hardware accelerators for simultaneous DNA sequence alignment. (12th October 2012)

• Record Type: Journal Article
• Authors: Sebastião, Nuno; Roma, Nuno; Flores, Paulo
• Other Names: Smari Waleed guestEditor.; Fiore Sandro guestEditor.; Hill David guestEditor.
• Is Part Of: Concurrency and computation. Volume 25:Number 10(2013:Jul.)
• Page Start: 1319
• Page End: 1339
• Publication Date: 2012-10-12
• Subjects: hardware accelerator -- DNA -- local sequence alignment -- traceback -- FPGA -- ASIC; Parallel processing (Electronic computers) -- Periodicals; Parallel computers -- Periodicals; 004.35
• DOI: 10.1002/cpe.2934
• Languages: English
• ISSNs: 1532-0626

Abstract

SUMMARY: A new class of efficient and flexible hardware accelerators for DNA local sequence alignment based on the widely used Smith–Waterman algorithm is proposed in this paper. This new class of accelerating structures exploits an innovative technique that tracks the origin coordinates of the best alignment to allow a significant reduction of the size of the dynamic programming matrix that needs to be recomputed during the subsequent traceback phase, providing a considerable reduction of the resulting time and memory requirements. The significant performance of the enhanced class of accelerators is attained by also providing support for an additional level of parallelism: the capability to concurrently align several query sequences with one or more reference sequences, according to the specific application requisites. Moreover, the accelerator class also includes specially designed processing elements that improve the resource usage when implemented in a Field Programmable Gate Array (FPGA), and easily provide several different configurations in an Application Specific Integrated Circuit (ASIC) implementation. Obtained results demonstrated that speedups as high as 278 can be obtained in ASIC accelerating structures. A FPGA‐based prototyping platform, operating at a 40 times lower clock frequency and incorporating a complete alignment embedded system, still provides significant speedups as high as 27, compared with a pure software implementation.Copyright © 2012 John Wiley & Sons, Ltd.