A 0.5-V 9.3-ENOB 68-nW 10-kS/s SAR ADC in 0.18-μm CMOS for biomedical applications. (January 2017)

• Record Type: Journal Article
• Authors: Bai, Wenbin; Zhu, Zhangming
• Is Part Of: Microelectronics journal. Volume 59(2016)
• Page Start: 40
• Page End: 46
• Publication Date: 2017-01
• Subjects: Biomedical -- ADC -- Low power -- Switching scheme -- Bootstrapped; Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2016.11.007
• Languages: English
• ISSNs: 0959-8324

Abstract

Abstract: This paper presents a 10-bit ultra-low power successive approximation register (SAR) analog-to-digital converter (ADC) intended for use in wearable biomedical circuits. In order to achieve the nanowatt range power consumption, an energy-efficiency modified VCM -based switching scheme is proposed. In addition, a fully dynamic comparator and a dynamic register are used to eliminate the static power consumption. To improve the signal linearity in such a low supply voltage, a double-boost bootstrapped switch is proposed. A prototype of the proposed SAR ADC was fabricated in 0.18 µm 1P6M CMOS technology within a bio-sensor front-end circuit, which occupies an active area of 370×390 µm 2 . The SAR ADC achieves 57.8 dB SNDR and consumes 68nW at 0.5 V supply voltage and 10 kHz sampling rate, resulting in a figure-of-merits (FOM) of 10.8fJ/conversion-step.