Cite
HARVARD Citation
Strangio, S. et al. (2017). Benchmarks of a III-V TFET technology platform against the 10-nm CMOS FinFET technology node considering basic arithmetic circuits. Solid-state electronics. pp. 37-42. [Online].
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Strangio, S. et al. (2017). Benchmarks of a III-V TFET technology platform against the 10-nm CMOS FinFET technology node considering basic arithmetic circuits. Solid-state electronics. pp. 37-42. [Online].