Low frequency noise assessment in n- and p-channel sub-10 nm triple-gate FinFETs: Part I: Theory and methodology. (February 2017) - Boudier, D.; Cretu, B.; Simoen, E.; Carin, R.; Veloso, A.; Collaert, N.; Thean, A.
Abstract: The transfer characteristic at room temperature of FinFETs processed for sub-10 nm technologies could always be explained by solving Poisson equation throughout the channel – dielectric interface. Various methods for the MOSFET parameters estimation are proposed in the literature. In this paper, the electrical parameters extraction technique based on the Y-function methodology is reminded. Low frequency noise is presented considering three major noise sources: 1/ f noise associated to carrier trapping-detrapping in the gate oxide, channel carrier mobility fluctuations and generation-recombination noise related to traps located in the depletion zone of the device. Theory and methodology in order to identify the 1/ f noise mechanism and to have information of the process induced traps in the silicon film using the noise spectroscopy technique are revisited.