Vertically Formed Graphene Stripe for 3D Field‐Effect Transistor Applications. Issue 3 (26th October 2016)

• Record Type: Journal Article
• Authors: Hong, Seul Ki; Bong, Jae Hoon; Cho, Byung Jin; Hwang, Wan Sik
• Is Part Of: Small. Volume 13:Issue 3(2017)
• Page Start: n/a
• Page End: n/a
• Publication Date: 2016-10-26
• Subjects: 3D devices -- atomic layer deposition -- field‐effect transistors -- graphene stripe -- graphene transfer; Nanotechnology -- Periodicals; Nanoparticles -- Periodicals; Microtechnology -- Periodicals; 620.5
• DOI: 10.1002/smll.201602373
• Languages: English
• ISSNs: 1613-6810

Abstract

Abstract : A 100‐nm wide, vertically formed graphene stripe (GS) is demonstrated for three‐dimensional (3D) electronic applications. The GS forms along the sidewall of a thin nickel film. It is possible to further scale down the GS width by engineering the deposited thickness of the atomic layer deposition (ALD) Ni film. Unlike a conventional GS or graphene nanoribbon (GNR), the vertically formed GS is made without a graphene transfer and etching process. The process integration of the proposed GS FETs resembles that of currently commercialized vertical NAND flash memory with a design rule of less than 20 nm, implying practical usage of this formed GS for 3D advanced FET applications. Abstract : 3D array field‐effect transistors are demonstrated using a vertically formed graphene strip. The source and drain are separated through a hole in the middle, and the gate dielectric and electrode are located inside the hole in the form of a cylindrical structure. Chip density can be increased by simply adding more layers with the same number of lithography steps.