An ultra‐slow‐wave transmission line on CMOS technology. Issue 3 (26th January 2017) - Arigong, Bayaner; Ren, Han; Ding, Jun; Chung, Hoon‐Ju; Jung, Sungyong; Kim, Hyoungsoo; Zhang, Hualiang
ABSTRACT: In this letter, utilizing multimetal layers in the CMOS process, an ultra‐slow‐wave on‐chip coplanar waveguide (CPW) transmission line with interdigital loaded stubs and floating strips is proposed. From the full‐wave 3D EM simulation and measurement results, it is found that the proposed on‐chip transmission line features smaller size and lower loss comparing to traditional on‐chip CPW transmission lines. © 2017 Wiley Periodicals, Inc. Microwave Opt Technol Lett 59:604–606, 2017