A novel approach to extracting extrinsic resistances for equivalent circuit model of nanoscale MOSFET. (12th April 2016) - Yu, Panpan; Zhou, Ying; Sun, Ling; Gao, Jianjun
Summary: A novel extrinsic resistance extraction method of MOSFET at V gs  =  V ds  = 0 V from S‐parameter measurements is presented in this paper. Simulated and measured results of 90‐nm gatelength MOSFET device with a 8 × 0.6 × 12 µm gatewidth (number of gate finger × unit gate width × cells) are compared, and good agreement has been obtained up to 50 GHz. Furthermore, comparisons between the proposed approach and other three methods published are also made in this paper. Copyright © 2016 John Wiley & Sons, Ltd.