Influence of Post-Annealing on Electrical Characteristics of Thin-Film Transistors with Atomic-Layer-Deposited ZnO-Channel/Al2O3-Dielectric*Supported by the National Natural Science Foundation of China under Grant Nos 61474027 and 61376008. (May 2016)

• Record Type: Journal Article
• Authors: Wang 王, You-Hang 有航; Ma 马, Qian 倩; Zheng 郑, Li-Li 丽丽; Liu 刘, Wen-Jun 文军; Ding 丁, Shi-Jin 士进; Lu 卢, Hong-Liang 红亮; Zhang 张, Wei 卫
• Is Part Of: Chinese physics letters. Volume 33:Number 5(2016:May)
• Publication Date: 2016-05
• Subjects: 85.30.Tv -- 85.30.De -- 81.15.Gh; Physics -- Periodicals; Electronic journals; 530.05
• DOI: 10.1088/0256-307X/33/5/058501
• Languages: English
• ISSNs: 0256-307X

Abstract

Abstract : High-performance thin-film transistors (TFTs) with a low thermal budget are highly desired for flexible electronic applications. In this work, the TFTs with atomic layer deposited ZnO-channel/Al2 O3 -dielectric are fabricated under the maximum process temperature of 200°C. First, we investigate the effect of post-annealing environment such as N2, H2 -N2 (4%) and O2 on the device performance, revealing that O2 annealing can greatly enhance the device performance. Further, we compare the influences of annealing temperature and time on the device performance. It is found that long annealing at 200°C is equivalent to and even outperforms short annealing at 300°C. Excellent electrical characteristics of the TFTs are demonstrated after O2 annealing at 200°C for 35 min, including a low off-current of 2.3 × 10 −13 A, a small sub-threshold swing of 245 mV/dec, a large on/off current ratio of 7.6×10 8, and a high electron effective mobility of 22.1 cm 2 /V·s. Under negative gate bias stress at − 10 V, the above devices show better electrical stabilities than those post-annealed at 300°C. Thus the fabricated high-performance ZnO TFT with a low thermal budget is very promising for flexible electronic applications.