Dynamic positive feedback source-coupled logic (D-PFSCL). Issue 10 (2nd October 2016)

• Record Type: Journal Article
• Authors: Gupta, Kirti; Pandey, Neeta; Gupta, Maneesha
• Is Part Of: International journal of electronics. Volume 103:Issue 10(2016)
• Page Start: 1626
• Page End: 1638
• Publication Date: 2016-10-02
• Subjects: Single-ended SCL -- PFSCL -- low power -- dynamic circuits -- positive feedback; Electronics -- Periodicals; Electronic control -- Periodicals; 621.381
• DOI: 10.1080/00207217.2016.1138519
• Languages: English
• ISSNs: 0020-7217

Abstract

ABSTRACT: This paper presents dynamic positive feedback source-coupled logic (D-PFSCL) style which is derived from positive feedback source-coupled logic (PFSCL). The proposed logic style uses dynamic current source in contrast to constant current source of PFSCL to attain lower power consumption. Two techniques for D-PFSCL style-based multistage applications are suggested. Several D-PFSCL gates are simulated and compared with the respective PFSCL counterparts through SPICE simulations by using Taiwan semiconductor manufacturing company 0.18 µm CMOS technology parameters. A maximum power reduction of 84% is achieved for D-PFSCL gates. The effect of process variation on the power consumption of the D-PFSCL gates shows a maximum variation factor of 1.5 between the best and the worst cases.