CMOS analogue amplifier circuits optimisation using hybrid backtracking search algorithm with differential evolution. Issue 4 (3rd July 2016)

• Record Type: Journal Article
• Authors: Mallick, S.; Kar, R.; Mandal, D.; Ghoshal, S.P.
• Is Part Of: Journal of experimental & theoretical artificial intelligence. Volume 28:Issue 4(2016)
• Page Start: 719
• Page End: 749
• Publication Date: 2016-07-03
• Subjects: CMOS -- circuit sizing -- two-stage operational amplifier -- differential amplifier -- backtracking search algorithm -- differential evolution -- evolutionary optimisation techniques; Artificial intelligence -- Periodicals; 006.3
• DOI: 10.1080/0952813X.2015.1042533
• Languages: English
• ISSNs: 0952-813X

Abstract

Abstract : This paper proposes a novel hybrid optimisation algorithm which combines the recently proposed evolutionary algorithm Backtracking Search Algorithm (BSA) with another widely accepted evolutionary algorithm, namely, Differential Evolution (DE). The proposed algorithm called BSA-DE is employed for the optimal designs of two commonly used analogue circuits, namely Complementary Metal Oxide Semiconductor (CMOS) differential amplifier circuit with current mirror load and CMOS two-stage operational amplifier (op-amp) circuit. BSA has a simple structure that is effective, fast and capable of solving multimodal problems. DE is a stochastic, population-based heuristic approach, having the capability to solve global optimisation problems. In this paper, the transistors' sizes are optimised using the proposed BSA-DE to minimise the areas occupied by the circuits and to improve the performances of the circuits. The simulation results justify the superiority of BSA-DE in global convergence properties and fine tuning ability, and prove it to be a promising candidate for the optimal design of the analogue CMOS amplifier circuits. The simulation results obtained for both the amplifier circuits prove the effectiveness of the proposed BSA-DE-based approach over DE, harmony search (HS), artificial bee colony (ABC) and PSO in terms of convergence speed, design specifications and design parameters of the optimal design of the analogue CMOS amplifier circuits. It is shown that BSA-DE-based design technique for each amplifier circuit yields the least MOS transistor area, and each designed circuit is shown to have the best performance parameters such as gain, power dissipation, etc., as compared with those of other recently reported literature.