Threshold voltage modeling for dual‐metal quadruple‐gate (DMQG) MOSFETs. (25th November 2015)

• Record Type: Journal Article
• Authors: Samoju, Visweswara Rao; Tiwari, Pramod Kumar
• Is Part Of: International journal of numerical modelling. Volume 29:Number 4(2016:Jul./Aug.)
• Page Start: 695
• Page End: 706
• Publication Date: 2015-11-25
• Subjects: dual‐metal quadruple‐gate (DMQG) MOSFETs -- 3D Laplace's equation -- threshold voltage -- potential distribution -- drain‐induced barrier lowering (DIBL); Electric networks -- Mathematical models -- Periodicals; Electronics -- Mathematical models -- Periodicals; 621.3011
• DOI: 10.1002/jnm.2126
• Languages: English
• ISSNs: 0894-3370

Abstract

Summary: In this paper, a three‐dimensional (3D) model of threshold voltage is presented for dual‐metal quadruple‐gate metal‐oxide‐semiconductor field effect transistors. The 3D channel potential is obtained by solving 3D Laplace's equation using an isomorphic polynomial function. Threshold voltage is defined as the gate voltage, at which the integrated charge (Qinv ) at the 'virtual‐cathode' reaches to a critical charge Qth . The potential distribution and the threshold voltage are studied with varying the device parameters like gate metal work functions, channel cross‐section, oxide thickness, and gate length ratio. Further, the drain‐induced barrier lowering has also been analyzed for different gate length ratios. The model results are compared with the numerical simulation results obtained from 3D ATLAS device simulation results. Copyright © 2015 John Wiley & Sons, Ltd.