Demonstration of Single Hole Transistor and Hybrid Circuits for Multivalued Logic and Memory Applications up to 350 K Using CMOS Silicon Nanowires. (8th February 2016) - Lavieville, Romain; Barraud, Sylvain; Arvet, Christian; Vizioz, Christian; Corna, Andrea; Jehl, Xavier; Sanquer, Marc; Vinet, Maud
Abstract : The operation of hybrid circuits consisting of a single hole transistor coupled to a metal oxide semiconductor field effect transistor (MOSFET) is demonstrated at 350 K. The devices are designed at ultimate scaling with complementary metal oxide semiconductor technology on 300 mm diameter silicon on insulator wafers using deep ultra‐violet lithography. Coulomb blockade oscillations up to 350 K are measured from silicon nanowire transistors with 20 nm Ω‐gate length and diameter under 5 nm. These oscillations are exploited to produce inverter/amplifier, literal gate, negative differential resistance and memory loop circuits for multivalued (MV) logic and MV memory applications, via hybridization with MOSFET in SETMOS configuration. The fabrication and the operation of these SHT‐MOSFET hybrid circuits at high temperature should spur single charge transistor integration into circuits for innovative applications in nanoelectronics. Abstract : Coulomb blockade oscillations up to 350 K are measured from silicon nanowire transistors with 20 nm Ω‐gate length and diameter under 5 nm. These oscillations are exploited to produce inverter/amplifier, literal gate, negative differential resistance, and memory loop circuits for multivalued logic and memory applications via hybridization with metal oxide semiconductor field effect transistor in SETMOS configuration.