A multilevel memristor–CMOS memory cell as a ReRAM. Issue 12 (December 2015)

• Record Type: Journal Article
• Authors: Rabbani, Payam; Dehghani, Rasoul; Shahpari, Nima
• Is Part Of: Microelectronics journal. Volume 46:Issue 12 Part A (2015)
• Page Start: 1283
• Page End: 1290
• Publication Date: 2015-12
• Subjects: Memristor -- Multilevel storage -- Hybrid structure -- Nonvolatile memory; Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2015.10.006
• Languages: English
• ISSNs: 0959-8324

Abstract

Abstract: Memristor is a newly invented device and since it has been found, has drawn a lot of attention from integrated electronics designers because of its nanometer size and special electrical properties. One of the most significant characteristics of a memristor is its memory property. In this paper, a nonvolatile memory cell, based on the hybrid structure of memristor and Complementary Metal-Oxide-Semiconductor (CMOS) is proposed which can be used as a resistive Random Access Memory (RAM). This cell can store data in either binary or non-binary (multilevel) logic, increasing the amount of storable data per square area of a memory chip by increasing the levels of stored data. The methodologies of work with this multilevel logic and data saving and retention are discussed and the suitable one is chosen. The proposed memory cell has a read time comparable to other RAMs and flash memories and percent׳s of area reduction per two bits of data with at least 50% increase in reading speed – for ternary logic – per data. Power consumption is also reduced. The buffer for this cell corresponding to ternary logic is also presented.