Improving performance of dispatch rules for daily scheduling of assembly and test operations. (December 2015)
- Record Type:
- Journal Article
- Title:
- Improving performance of dispatch rules for daily scheduling of assembly and test operations. (December 2015)
- Main Title:
- Improving performance of dispatch rules for daily scheduling of assembly and test operations
- Authors:
- Jia, Shihui
Bard, Jonathan F.
Chacon, Rodolfo
Stuber, John - Abstract:
- Highlights: We investigate the performance of an assembly and test semiconductor facility. New dispatch rules are developed for setting up and assigning lots to machines. The methodology combines metaheuristic logic and discrete event simulation. On-time delivery and throughput benefit greatly from the new rules. Abstract: In recent years, there has been an increasing effort to improve the performance of semiconductor assembly and test facilities given their critical role in achieving on-time delivery. Using the simulation package AutoSched AP (ASAP) as the analytic tool, the goal of this paper is to show how the logic of intelligent heuristics can be combined with discrete event simulation to evaluate various dispatch rules for machine setup and scheduling in such facilities. The problem addressed is defined by a set of resources that includes machines and tooling, process plans for each product, and four hierarchical objectives: minimize the weighted sum of key device shortages, maximize weighted throughput, minimize the number of machines used, and minimize makespan for a given set of lots in queue. Three new dispatch rules are presented for configuring machines and assigning lots to them in assembly and test facilities. The first gives priority to hot lots containing key devices while using the setup frequency table obtained from our machine optimizer that takes the form of a greedy randomized adaptive search procedure (GRASP). The second embeds the more robust selectionHighlights: We investigate the performance of an assembly and test semiconductor facility. New dispatch rules are developed for setting up and assigning lots to machines. The methodology combines metaheuristic logic and discrete event simulation. On-time delivery and throughput benefit greatly from the new rules. Abstract: In recent years, there has been an increasing effort to improve the performance of semiconductor assembly and test facilities given their critical role in achieving on-time delivery. Using the simulation package AutoSched AP (ASAP) as the analytic tool, the goal of this paper is to show how the logic of intelligent heuristics can be combined with discrete event simulation to evaluate various dispatch rules for machine setup and scheduling in such facilities. The problem addressed is defined by a set of resources that includes machines and tooling, process plans for each product, and four hierarchical objectives: minimize the weighted sum of key device shortages, maximize weighted throughput, minimize the number of machines used, and minimize makespan for a given set of lots in queue. Three new dispatch rules are presented for configuring machines and assigning lots to them in assembly and test facilities. The first gives priority to hot lots containing key devices while using the setup frequency table obtained from our machine optimizer that takes the form of a greedy randomized adaptive search procedure (GRASP). The second embeds the more robust selection features of GRASP in the ASAP model through customization. This allows ASAP to explore a larger portion of the feasible region at each decision point by randomizing machine setups using adaptive probability distributions that are a function of solution quality. The third rule, which is a simplification of the second, always picks the setup for a particular machine that gives the greatest marginal improvement in the objective function among all candidates. The computational analysis showed that the three dispatch rules greatly improved ASAP performance with respect to the four objectives. … (more)
- Is Part Of:
- Computers & industrial engineering. Volume 90(2015)
- Journal:
- Computers & industrial engineering
- Issue:
- Volume 90(2015)
- Issue Display:
- Volume 90, Issue 2015 (2015)
- Year:
- 2015
- Volume:
- 90
- Issue:
- 2015
- Issue Sort Value:
- 2015-0090-2015-0000
- Page Start:
- 86
- Page End:
- 106
- Publication Date:
- 2015-12
- Subjects:
- Machine setup -- Reentrant flow -- Semiconductor assembly and test -- AutoSched -- GRASP
Engineering -- Data processing -- Periodicals
Industrial engineering -- Periodicals
620.00285 - Journal URLs:
- http://www.sciencedirect.com/science/journal/03608352 ↗
http://www.elsevier.com/journals ↗ - DOI:
- 10.1016/j.cie.2015.08.016 ↗
- Languages:
- English
- ISSNs:
- 0360-8352
- Deposit Type:
- Legaldeposit
- View Content:
- Available online (eLD content is only available in our Reading Rooms) ↗
- Physical Locations:
- British Library DSC - 3394.713000
British Library DSC - BLDSS-3PM
British Library HMNTS - ELD Digital store - Ingest File:
- 1305.xml