High‐Performance, Air‐Stable, Top‐Gate, p‐Channel WSe2 Field‐Effect Transistor with Fluoropolymer Buffer Layer. (23rd October 2015)

• Record Type: Journal Article
• Authors: Shokouh, Seyed Hossein Hosseini; Jeon, Pyo Jin; Pezeshki, Atiye; Choi, Kyunghee; Lee, Hee Sung; Kim, Jin Sung; Park, Eun Young; Im, Seongil
• Is Part Of: Advanced functional materials. Volume 25:Number 46(2015)
• Page Start: 7208
• Page End: 7214
• Publication Date: 2015-10-23
• Subjects: nanoflakes -- field‐effect transistors -- organic‐inorganic hybrid materials; Materials -- Periodicals; Chemical vapor deposition -- Periodicals; 620.11
• DOI: 10.1002/adfm.201502008
• Languages: English
• ISSNs: 1616-301X

Abstract

Abstract : High‐performance, air‐stable, p‐channel WSe2 top‐gate field‐effect transistors (FETs) using a bilayer gate dielectric composed of high‐ and low‐ k dielectrics are reported. Using only a high‐k Al2 O3 as the top‐gate dielectric generally degrades the electrical properties of p‐channel WSe2, therefore, a thin fluoropolymer (Cytop) as a buffer layer to protect the 2D channel from high‐ k oxide forming is deposited. As a result, a top‐gate‐patterned 2D WSe2 FET is realized. The top‐gate p‐channel WSe2 FET demonstrates a high hole mobility of 100 cm 2 ­ V −1 s −1 and a I ON / I OFF ratio > 10 7 at low gate voltages ( V GS ca. −4 V) and a drain voltage ( V DS ) of −1 V on a glass substrate. Furthermore, the top‐gate FET shows a very good stability in ambient air with a relative humidity of 45% for 7 days after device fabrication. Our approach of creating a high‐ k oxide/low‐ k organic bilayer dielectric is advantageous over single‐layer high‐ k dielectrics for top‐gate p‐channel WSe2 FETs, which will lead the way toward future electronic nanodevices and their integration. Abstract : A bilayer gate dielectric composed of a high‐ k Al2 O3 layer and a low‐ k fluoropolymer layer yields field‐effect transistors (FETs) with excellent gating properties. The proposed top‐gate p‐channel WSe2 FETs demonstrate a high hole mobility of 100 cm 2 V −1 s −1 and an I ON / I OFF ratio of >10 7 on a glass substrate. Furthermore, the top‐gate FET shows a very good stability in ambient air up to 7 days after device fabrication.