Cite
HARVARD Citation
Liang, Y. et al. (2015). A 10-bit 300-MS/s asynchronous SAR ADC with strategy of optimizing settling time for capacitive DAC in 65 nm CMOS. Microelectronics journal. 46 (10), pp. 988-995. [Online].
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Liang, Y. et al. (2015). A 10-bit 300-MS/s asynchronous SAR ADC with strategy of optimizing settling time for capacitive DAC in 65 nm CMOS. Microelectronics journal. 46 (10), pp. 988-995. [Online].