Optimized structures of hybrid ripple carry and hierarchical carry lookahead adders. Issue 9 (September 2015)

• Record Type: Journal Article
• Authors: Ibrahim, Atef; Gebali, Fayez
• Is Part Of: Microelectronics journal. Volume 46:Issue 9(2015)
• Page Start: 783
• Page End: 794
• Publication Date: 2015-09
• Subjects: Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2015.06.008
• Languages: English
• ISSNs: 0959-8324

Abstract

<abstract abstract-type="author" id="ab0005"> <title id="sect0005">Abstract</title> <sec> <p id="sp0110">This paper proposes improved structures for fast adders that include carry lookahead (CLA) and hierarchical carry lookahead (HCLA). Also, it proposes optimized novel structures of hybrid ripple carry/hierarchical carry lookahead (RCA/HCLA) adders. A general methodology is presented for constructing <italic>M</italic>-bit hierarchical carry lookahead adders using <italic>n</italic>-bit modules. The only restriction on the values of <italic>M</italic> or <italic>n</italic> is <inline-formula><alternatives><inline-graphic xlink:href="ark:/27927/pgj2frffzxt" xlink:type="simple" xmlns:xlink="http://www.w3.org/1999/xlink" /><mml:math altimg="si0009.gif" overflow="scroll" id="d13e1175" xmlns:mml="http://www.w3.org/1998/Math/MathML"><mml:mi>n</mml:mi><mml:mo>≤</mml:mo><mml:mi>M</mml:mi></mml:math></alternatives></inline-formula>. Two algorithms are developed to efficiently construct hierarchical carry lookahead adders for the case when <italic>M</italic> is not an integer power or an integer multiple of <italic>n</italic>. The improved hierarchical levels of carry lookahead adders are integrated with the ripple carry adder to construct the novel hybrid RCA/HCLA adders. Area and time complexities of the resulting designs are reported for different values of radix <italic>n</italic> and the practical values of 32 and 64 bits of <italic>M</italic>. An ASIC implementation of the proposed structures and previously published recent designs shows that one of the proposed hybrid RCA/HCAL adders achieves 28.2–77.7% reduction in area–delay product and 40.5–75.8% reduction in energy, for <italic>M</italic>=64 and <italic>n</italic>=8, over the different compared adder designs.</p> </sec> </abstract>