A process and temperature robust constant-gm input/output rail-to-rail op-amp. Issue 6 (June 2015)
- Record Type:
- Journal Article
- Title:
- A process and temperature robust constant-gm input/output rail-to-rail op-amp. Issue 6 (June 2015)
- Main Title:
- A process and temperature robust constant-gm input/output rail-to-rail op-amp
- Authors:
- Shahpari, Nima
Dehghani, Rasul
Rabani, Payam - Abstract:
- <abstract abstract-type="author" id="ab0005"> <title id="sect0005">Abstract</title> <sec> <p id="sp0090">A rail-to-rail operational amplifier is designed with minimum variation in the input stage transconductance (<inline-formula><alternatives><inline-graphic xlink:href="ark:/27927/pgj24fgqfcd" xlink:type="simple" xmlns:xlink="http://www.w3.org/1999/xlink" /><mml:math altimg="si0041.gif" overflow="scroll" id="d13e935" xmlns:mml="http://www.w3.org/1998/Math/MathML"><mml:msub><mml:mrow><mml:mi>g</mml:mi></mml:mrow><mml:mrow><mml:mi>m</mml:mi></mml:mrow></mml:msub></mml:math></alternatives></inline-formula>) in standard <inline-formula><alternatives><inline-graphic xlink:href="ark:/27927/pgj24fgq4pq" xlink:type="simple" xmlns:xlink="http://www.w3.org/1999/xlink" /><mml:math altimg="si0042.gif" overflow="scroll" id="d13e944" xmlns:mml="http://www.w3.org/1998/Math/MathML"><mml:mn>0.18</mml:mn><mml:mspace width=".25em" /><mml:mspace width=".25em" /><mml:mi mathvariant="normal">μ</mml:mi><mml:mi>m</mml:mi></mml:math></alternatives></inline-formula> CMOS technology. In this design, transconductance is maintained approximately constant independent of the operation region of the input transistors (i.e., saturation or weak inversion regions). Unlike conventional methods in rail-to-rail designs in which two complementary differential pairs are used, in this work, by using a single input pair, the sensitivity to mismatches between PMOS and NMOS input transistors is eliminated. A<abstract abstract-type="author" id="ab0005"> <title id="sect0005">Abstract</title> <sec> <p id="sp0090">A rail-to-rail operational amplifier is designed with minimum variation in the input stage transconductance (<inline-formula><alternatives><inline-graphic xlink:href="ark:/27927/pgj24fgqfcd" xlink:type="simple" xmlns:xlink="http://www.w3.org/1999/xlink" /><mml:math altimg="si0041.gif" overflow="scroll" id="d13e935" xmlns:mml="http://www.w3.org/1998/Math/MathML"><mml:msub><mml:mrow><mml:mi>g</mml:mi></mml:mrow><mml:mrow><mml:mi>m</mml:mi></mml:mrow></mml:msub></mml:math></alternatives></inline-formula>) in standard <inline-formula><alternatives><inline-graphic xlink:href="ark:/27927/pgj24fgq4pq" xlink:type="simple" xmlns:xlink="http://www.w3.org/1999/xlink" /><mml:math altimg="si0042.gif" overflow="scroll" id="d13e944" xmlns:mml="http://www.w3.org/1998/Math/MathML"><mml:mn>0.18</mml:mn><mml:mspace width=".25em" /><mml:mspace width=".25em" /><mml:mi mathvariant="normal">μ</mml:mi><mml:mi>m</mml:mi></mml:math></alternatives></inline-formula> CMOS technology. In this design, transconductance is maintained approximately constant independent of the operation region of the input transistors (i.e., saturation or weak inversion regions). Unlike conventional methods in rail-to-rail designs in which two complementary differential pairs are used, in this work, by using a single input pair, the sensitivity to mismatches between PMOS and NMOS input transistors is eliminated. A Monte-Carlo simulation with <italic>n</italic>=300 was run to ensure mismatch insensitivity. Simulation results show that the input stage transconductance deviation as the input common-mode voltage varies from rail-to-rail is less than ±<inline-formula><alternatives><inline-graphic xlink:href="ark:/27927/pgj24fgr5rt" xlink:type="simple" xmlns:xlink="http://www.w3.org/1999/xlink" /><mml:math altimg="si0043.gif" overflow="scroll" id="d13e957" xmlns:mml="http://www.w3.org/1998/Math/MathML"><mml:mn>0.81</mml:mn><mml:mo>%</mml:mo><mml:mo>, </mml:mo></mml:math></alternatives></inline-formula> in typical conditions and at 27 °C. When the temperature varies from −20 °C to 120 °C, the variation does not exceed ±1.28%. Furthermore, the variations of <inline-formula><alternatives><inline-graphic xlink:href="ark:/27927/pgj24fgr4x2" xlink:type="simple" xmlns:xlink="http://www.w3.org/1999/xlink" /><mml:math altimg="si0044.gif" overflow="scroll" id="d13e972" xmlns:mml="http://www.w3.org/1998/Math/MathML"><mml:msub><mml:mrow><mml:mi>g</mml:mi></mml:mrow><mml:mrow><mml:mi>m</mml:mi></mml:mrow></mml:msub></mml:math></alternatives></inline-formula> in two long-channel (<italic>L</italic>=1 µm) and short-channel (<italic>L</italic>=0.18 µm) cases are ±0.85% and ±0.9%, respectively. This proves that the introduced circuit works properly regardless of the channel length of the input pair.</p> </sec> </abstract> … (more)
- Is Part Of:
- Microelectronics journal. Volume 46:Issue 6(2015)
- Journal:
- Microelectronics journal
- Issue:
- Volume 46:Issue 6(2015)
- Issue Display:
- Volume 46, Issue 6 (2015)
- Year:
- 2015
- Volume:
- 46
- Issue:
- 6
- Issue Sort Value:
- 2015-0046-0006-0000
- Page Start:
- 506
- Page End:
- 512
- Publication Date:
- 2015-06
- Subjects:
- Microelectronics -- Periodicals
Microélectronique -- Périodiques
Microelectronics
Electronic journals
Journals - contents and abstracts
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621.3805 - Journal URLs:
- http://catalog.hathitrust.org/api/volumes/oclc/5877621.html ↗
http://www.sciencedirect.com/science/journal/00262692 ↗
http://www.intute.ac.uk/sciences/cgi-bin/fullrecord.pl?handle=lesa.1012319367 ↗
http://www.elsevier.com/journals ↗
http://www.elsevier.com/homepage/elecserv.htt ↗ - DOI:
- 10.1016/j.mejo.2015.03.015 ↗
- Languages:
- English
- ISSNs:
- 0959-8324
- Deposit Type:
- Legaldeposit
- View Content:
- Available online (eLD content is only available in our Reading Rooms) ↗
- Physical Locations:
- British Library DSC - 5758.973000
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