Cite
HARVARD Citation
Wang, C. et al. (2015). A ±3.07% frequency variation clock generator implemented using HV CMOS process. Microelectronics journal. 46 (4), pp. 285-290. [Online].
This is an interim version of our Electronic Legal Deposit Catalogue-eJournals and eBooks while we continue to recover from a cyber-attack.
Wang, C. et al. (2015). A ±3.07% frequency variation clock generator implemented using HV CMOS process. Microelectronics journal. 46 (4), pp. 285-290. [Online].