A 3.6‐mW 6‐GHz current‐reuse VCO‐buffer with improved load drivability in 65‐nm CMOS. (20th June 2013)

• Record Type: Journal Article
• Authors: Amin, Tawfiq; Mak, Pui‐In; Martins, Rui P.
• Is Part Of: International journal of circuit theory and applications. Volume 43:Number 1(2015:Jan.)
• Page Start: 133
• Page End: 138
• Publication Date: 2013-06-20
• Subjects: Electric circuit analysis -- Periodicals; 621.319205
• DOI: 10.1002/cta.1933
• Languages: English
• ISSNs: 0098-9886

Abstract

<abstract abstract-type="main"> <title>Abstract</title> <p>A new current‐reuse voltage‐controlled oscillator (VCO)‐buffer with enhanced load drivability is proposed. It incorporates a PMOS‐based source follower stacked atop a NMOS‐based LC VCO to share the bias current, while preventing the voltage stress at any oscillation node from exceeding the 1.2‐V technology voltage limit. Also, ac‐coupling networks are avoided between the VCO and buffer, improving the Q of the LC tank while minimizing parasitics. With internal buffering, the VCO can directly drive up a 50‐Ω load for testing, or to withstand a large capacitive load in on‐chip local oscillator distribution, <underline>particularly suitable for multi‐band MIMO WLAN radios</underline>. The fabricated VCO‐buffer in 65‐nm CMOS measures 13.8% tuning range from 5.64 to 6.4 GHz, consumes 3.6 mW at 1.2 V and exhibits −108.84 dBc/Hz phase noise at 1‐MHz offset. Copyright © 2013 John Wiley &amp; Sons, Ltd.</p> </abstract>