Optical crossbars on chip, a comparative study based on worst‐case losses. (21st July 2014)

• Record Type: Journal Article
• Authors: Le Beux, Sébastien; Li, Hui; Nicolescu, Gabriela; Trajkovic, Jelena; O'Connor, Ian; Bartolini, Sandro; García, José M.; Pierson, Jean‐Marc; Dittman, Lars; Da Costa, Georges
• Is Part Of: Concurrency and computation. Volume 26:Number 15(2014:Oct.)
• Page Start: 2492
• Page End: 2503
• Publication Date: 2014-07-21
• Subjects: Parallel processing (Electronic computers) -- Periodicals; Parallel computers -- Periodicals; 004.35
• DOI: 10.1002/cpe.3336
• Languages: English
• ISSNs: 1532-0626

Abstract

<abstract abstract-type="main"> <title>SUMMARY</title> <p>The many‐core design research community has shown high interest in optical crossbar on chip for more than a decade. Key properties of optical crossbars, namely (1) contention‐free data routing, (2) low latency communication, and (3) potential for high bandwidth through the use of wavelength division multiplexing, motivate several implementations of this type of interconnect. These implementations demonstrate very different scalability and power efficiency abilities depending on three key design factors: (1) network topology, (2) considered layout, and (3) insertion losses induced by the fabrication process. In this paper, the worst‐case optical losses of crossbar implementations are compared according to the factors mentioned earlier. The comparison results have the potential to help many‐core system designer to select the most appropriate crossbar implementation according to, for instance, the number of IP cores and the die size. Copyright © 2014 John Wiley &amp; Sons, Ltd.</p> </abstract>