A Review of Three‐Dimensional Resistive Switching Cross‐Bar Array Memories from the Integration and Materials Property Points of View. (3rd July 2014) - Seok, Jun Yeong; Song, Seul Ji; Yoon, Jung Ho; Yoon, Kyung Jean; Park, Tae Hyung; Kwon, Dae Eun; Lim, Hyungkwang; Kim, Gun Hwan; Jeong, Doo Seok; Hwang, Cheol Seong
<x xml:space="preserve">Abstract</x> Issues in the circuitry, integration, and material properties of the two‐dimensional (2D) and three‐dimensional (3D) crossbar array (CBA)‐type resistance switching memories are described. Two important quantitative guidelines for the memory integration are provided with respect to the required numbers of signal wires and sneak current paths. The advantage of 3D CBAs over 2D CBAs (i.e., the decrease in effect memory cell size) can be exploited only under certain limited conditions due to the increased area and layout complexity of the periphery circuits. The sneak current problem can be mitigated by the adoption of different voltage application schemes and various selection devices. These have critical correlations, however, and depend on the involved types of resistance switching memory. The problem is quantitatively dealt with using the generalized equation for the overall resistance of the parasitic current paths. Atomic layer deposition is discussed in detail as the most feasible fabrication process of 3D CBAs because it can provide the device with the necessary conformality and atomic‐level accuracy in thickness control. Other subsidiary issues related to the line resistance, maximum available current, and fabrication technologies are also reviewed. Finally, a summary and outlook on various other applications of 3D CBAs are provided.