32 × 32 Crossbar Array Resistive Memory Composed of a Stacked Schottky Diode and Unipolar Resistive Memory. (18th October 2012) - Kim, Gun Hwan; Lee, Jong Ho; Ahn, Youngbae; Jeon, Woojin; Song, Seul Ji; Seok, Jun Yeong; Yoon, Jung Ho; Yoon, Kyung Jean; Park, Tae Joo; Hwang, Cheol Seong
Abstract Various array types of 1‐diode and 1‐resistor stacked crossbar array (1D1R CA) devices composed of a Schottky diode (SD) (Pt/TiO2/Ti/Pt) and a resistive switching (RS) memory cell (Pt/TiO2/Pt) are fabricated and their performances are investigated. The unit cell of the 1D1R CA device shows high RS resistance ratio (≈103 at 1.5 V) between low and high resistance state (LRS and HRS), and high rectification ratio (≈105) between LRS and reverse‐state SD. It also shows a short RS time of <50 ns for SET (resistance transition from HRS to LRS), and ≈600 ns for RESET (resistance transition from LRS to HRS), as well as stable RS endurance and data retention characteristics. It is experimentally confirmed that the selected unit cell in HRS (logically the "off" state) is stably readable when it is surrounded by unselected LRS (logically the "on" state) cells, in an array of up to 32 × 32 cells. The SD, as a highly non‐linear resistor, appropriately controls the conducting path formation during the switching and protects the memory element from the noise during retention.