Complementary Logic Gate Arrays Based on Carbon Nanotube Network Transistors. Issue 6 (3rd December 2012)

• Record Type: Journal Article
• Authors: Gao, Pingqi; Zou, Jianping; Li, Hong; Zhang, Kang; Zhang, Qing
• Is Part Of: Small. Volume 9:Issue 6(2013:Mar.)
• Page Start: 813
• Page End: 819
• Publication Date: 2012-12-03
• Subjects: Nanotechnology -- Periodicals; Nanoparticles -- Periodicals; Microtechnology -- Periodicals; 620.5
• DOI: 10.1002/smll.201201237
• Languages: English
• ISSNs: 1613-6810

Abstract

<abstract abstract-type="graphical" xml:lang="en"> <title> <x xml:space="preserve">Abstract</x> </title> <p> <bold>An efficient technique of fabricating high performance n‐ and p‐ type single‐walled carbon nanotube</bold> (SWNT) network field‐effect transistors (NET‐FETs) is successfully demonstrated. Complementary inverters, NOR, NAND, OR, AND logic gates have been achieved from integrating these p‐ and n‐type SWNT‐NET‐FETs. The processing technique described here is fully compatible with conventional silicon microelectronic technologies and it is readily suitable for scalable integration. <boxed-text content-type="graphic" position="anchor" orientation="portrait"><graphic position="anchor" mimetype="image" xlink:href="ark:/27927/pgg1vb1x0nx" orientation="portrait" xlink:type="simple" xmlns:xlink="http://www.w3.org/1999/xlink" /></boxed-text></p> </abstract>