DC‐20 GHz 5‐BIT CMOS digital step attenuator with low insertion loss and phase error. Issue 4 (27th February 2013)

• Record Type: Journal Article
• Authors: Cho, Moon‐Kyu; Baek, Donghyun; Kim, Jeong‐Geun
• Is Part Of: Microwave and optical technology letters. Volume 55:Issue 4(2013:Apr.)
• Page Start: 762
• Page End: 764
• Publication Date: 2013-02-27
• Subjects: Microwaves -- Periodicals; Optics -- Periodicals; 621
• DOI: 10.1002/mop.27448
• Languages: English
• ISSNs: 0895-2477

Abstract

<abstract abstract-type="main" xml:lang="en"> <title>Abstract</title> <p>This article presents a 5‐bit broadband digital step attenuator with low insertion loss and phase error using a standard 0.13 μm CMOS process for the phased array antenna.The maximum attenuation of 31 dB with the LSB of 1 dB is achieved at DC‐20 GHz. The measured insertion loss of the reference state is &lt;11 dB and the input and output return losses are &lt;−10 dB at DC‐20 GHz. The root mean square (RMS) phase and amplitude errors are &lt;2.5° and &lt;0.7 dB, respectively. The current consumption is near zero with 1.2 V supply. The chip size is 1.04 × 0.48 mm² including pads. © 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 55:762–764, 2013; View this article online at wileyonlinelibrary.com. DOI: 10.1002/mop.27448</p> </abstract>