Layer‐by‐Layer‐Assembled Reduced Graphene Oxide/Gold Nanoparticle Hybrid Double‐Floating‐Gate Structure for Low‐Voltage Flexible Flash Memory. (5th November 2012) - Han, Su‐Ting; Zhou, Ye; Wang, Chundong; He, Lifang; Zhang, Wenjun; Roy, V. A. L.
<x xml:space="preserve">Abstract</x> A hybrid double‐floating‐gate flexible memory device by utilizing an rGO‐sheet monolayer and a Au NP array as upper and lower floating gates is reported. The rGO buffer layer acts as a charge‐trapping layer and introduces an energy barrier between the Au NP lower floating gate and the channel. The proposed memory device demonstrates a strong improvement in both field‐effect‐transistor (FET) and memory characteristics. <boxed-text content-type="graphic" position="anchor" orientation="portrait"> </boxed-text>