VHDL‐AMS in switched‐current analog filter pair design based on a gyrator‐capacitor prototype circuit. (9th August 2013)

• Record Type: Journal Article
• Authors: Handkiewicz, Andrzej; Katarzyński, Piotr; Szczęsny, Szymon; Naumowicz, Mariusz; Melosik, Michał; Śniatała, Paweł
• Is Part Of: International journal of numerical modelling. Volume 27:Number 2(2014:Mar./Apr.)
• Page Start: 268
• Page End: 281
• Publication Date: 2013-08-09
• Subjects: Electric networks -- Mathematical models -- Periodicals; Electronics -- Mathematical models -- Periodicals; 621.3011
• DOI: 10.1002/jnm.1921
• Languages: English
• ISSNs: 0894-3370

Abstract

<abstract abstract-type="main" id="jnm1921-abs-0001"> <title>SUMMARY</title> <p id="jnm1921-para-0007">This paper presents an approach to a low‐sensitivity design strategy for switched‐current (SI) filter pairs based on a gyrator‐capacitor prototype circuit. On the basis of a prototype filter, an SI counterpart circuit is obtained. Tools for SI filter design automation have been developed, which make a hardware description language ‐ analog‐mixed signal synthesization for the chosen kind of circuit. The obtained SI filter is better than the filter obtained using LC ladder structures with respect to very‐large‐scale integration complementary metal‐oxide‐semiconductor chip area and power consumption. Copyright © 2013 John Wiley &amp; Sons, Ltd.</p> </abstract>