Nanoscale channel engineered double gate MOSFET for mixed signal applications using high‐k dielectric. (10th March 2012)

• Record Type: Journal Article
• Authors: Nirmal, D; Vijayakumar, P; Shruti, K; Mohankumar, N; Csurgay, Árpád I.; Porod, Wolfgang
• Is Part Of: International journal of circuit theory and applications. Volume 41:Number 6(2013:Jun.)
• Page Start: 608
• Page End: 618
• Publication Date: 2012-03-10
• Subjects: Electric circuit analysis -- Periodicals; 621.319205
• DOI: 10.1002/cta.1800
• Languages: English
• ISSNs: 0098-9886

Abstract

<abstract abstract-type="main"> <title>ABSTRACT</title> <p>FinFETs (fin field effect transistors) are used for complementary‐symmetry metal–oxide–semiconductor applications beyond the 45‐nm node of the SIA roadmap because of their excellent scalability and better immunity to short channel effects. However, FinFETs having channel lengths below 100 nm show considerable leakage current and threshold voltage roll‐off. To overcome these effects, a channel engineering technique is introduced. A single halo (SH) FinFET is developed using Sentaurus simulator, and its analog performance is investigated. The device performance is analysed by replacing the gate dielectric silicon dioxide with various high dielectric constant (k) materials, and it is observed that the integration of high‐k dielectrics in the devices significantly reduces the short channel effects and leakage current. The suitability of nanoscale SH FinFETs for circuit applications is observed with the help of an inverter circuit, and their gain values are calculated for circuit applications. Copyright © 2012 John Wiley &amp; Sons, Ltd.</p> </abstract>