Structured computer organization. (©2013)
- Record Type:
- Book
- Title:
- Structured computer organization. (©2013)
- Main Title:
- Structured computer organization.
- Other Names:
- Tanenbaum, Andrew S, 1944-
Austin, Todd
Chandavarkar, B. R - Contents:
- CHAPTER 1 INTRODUCTION 1.1 STRUCTURED COMPUTER ORGANIZATION 1.1.1 Languages, Levels, and Virtual Machines 1.1.2 Contemporary Multilevel Machines 1.1.3 Evolution of Multilevel Machines 1.2 MILESTONES IN COMPUTER ARCHITECTURE 1.2.1 The Zeroth Generation (Mechanical Computers (1642-1945)) 1.2.2 The First Generation (Vacuum Tubes (1945-1955)) 1.2.3 The Second Generation (Transistors (1955-1965)) 1.2.4 The Third Generation (Integrated Circuits (1965-1980)) 1.2.5 The Fourth Generation (Very Large Scale Integration (1980-?)) 1.2.6 The Fifth Generation (Low-Power and Invisible Computers) 1.3 THE COMPUTER ZOO 1.3.1 Technological and Economic Forces 1.3.2 The Computer Spectrum 1.3.3 Disposable Computers 1.3.4 Microcontrollers 1.3.5 Mobile and Game Computers 1.3.6 Personal Computers 1.3.7 Servers 1.3.8 Mainframes 1.4 EXAMPLE COMPUTER FAMILIES 1.4.1 Introduction to the x86 Architecture 1.4.2 Introduction to the ARM Architecture 1.4.3 Introduction to the AVR Architecture 1.5 METRIC UNITS 1.6 OUTLINE OF THIS BOOK CHAPTER 2 COMPUTER SYSTEMS ORGANIZATION 2.1 PROCESSORS 2.1.1 CPU Organization 2.1.2 Instruction Execution 2.1.3 RISC versus CISC 2.1.4 Design Principles for Modern Computers 2.1.5 Instruction-Level Parallelism 2.1.6 Processor-Level Parallelism 2.2 PRIMARY MEMORY 2.2.1 Bits 2.2.2 Memory Addresses 2.2.3 Byte Ordering 2.2.4 Error-Correcting Codes 2.2.5 Cache Memory 2.2.6 Memory Packaging and Types 2.3 SECONDARY MEMORY 2.3.1 Memory Hierarchies 2.3.2 Magnetic Disks 2.3.3 IDE DisksCHAPTER 1 INTRODUCTION 1.1 STRUCTURED COMPUTER ORGANIZATION 1.1.1 Languages, Levels, and Virtual Machines 1.1.2 Contemporary Multilevel Machines 1.1.3 Evolution of Multilevel Machines 1.2 MILESTONES IN COMPUTER ARCHITECTURE 1.2.1 The Zeroth Generation (Mechanical Computers (1642-1945)) 1.2.2 The First Generation (Vacuum Tubes (1945-1955)) 1.2.3 The Second Generation (Transistors (1955-1965)) 1.2.4 The Third Generation (Integrated Circuits (1965-1980)) 1.2.5 The Fourth Generation (Very Large Scale Integration (1980-?)) 1.2.6 The Fifth Generation (Low-Power and Invisible Computers) 1.3 THE COMPUTER ZOO 1.3.1 Technological and Economic Forces 1.3.2 The Computer Spectrum 1.3.3 Disposable Computers 1.3.4 Microcontrollers 1.3.5 Mobile and Game Computers 1.3.6 Personal Computers 1.3.7 Servers 1.3.8 Mainframes 1.4 EXAMPLE COMPUTER FAMILIES 1.4.1 Introduction to the x86 Architecture 1.4.2 Introduction to the ARM Architecture 1.4.3 Introduction to the AVR Architecture 1.5 METRIC UNITS 1.6 OUTLINE OF THIS BOOK CHAPTER 2 COMPUTER SYSTEMS ORGANIZATION 2.1 PROCESSORS 2.1.1 CPU Organization 2.1.2 Instruction Execution 2.1.3 RISC versus CISC 2.1.4 Design Principles for Modern Computers 2.1.5 Instruction-Level Parallelism 2.1.6 Processor-Level Parallelism 2.2 PRIMARY MEMORY 2.2.1 Bits 2.2.2 Memory Addresses 2.2.3 Byte Ordering 2.2.4 Error-Correcting Codes 2.2.5 Cache Memory 2.2.6 Memory Packaging and Types 2.3 SECONDARY MEMORY 2.3.1 Memory Hierarchies 2.3.2 Magnetic Disks 2.3.3 IDE Disks 2.3.4 SCSI Disks 2.3.5 RAID 2.3.6 Solid-State Disks 2.3.7 CD-ROMs 2.3.8 CD-Recordables 2.3.9 CD-Rewritables 2.3.10 DVD 2.3.11 Blu-ray 2.4 INPUT/OUTPUT 2.4.1 Buses 2.4.2 Terminals 2.4.3 Mice 2.4.4 Game Controllers 2.4.5 Printers 2.4.6 Telecommunications Equipment 2.4.7 Digital Cameras 2.4.8 Character Codes 2.5 SUMMARY CHAPTER 3 THE DIGITAL LOGIC LEVEL 3.1 GATES AND BOOLEAN ALGEBRA 3.1.1 Gates 3.1.2 Boolean Algebra 3.1.3 Implementation of Boolean Functions 3.1.4 Circuit Equivalence 3.2 BASIC DIGITAL LOGIC CIRCUITS 3.2.1 Integrated Circuits 3.2.2 Combinational Circuits 3.2.3 Arithmetic Circuits 3.2.4 Clocks 3.3 MEMORY 3.3.1 Latches 3.3.2 Flip-Flops 3.3.3 Registers 3.3.4 Memory Organization 3.3.5 Memory Chips 3.3.6 RAMs and ROMs 3.4 CPU CHIPS AND BUSES 3.4.1 CPU Chips 3.4.2 Computer Buses 3.4.3 Bus Width 3.4.4 Bus Clocking 3.4.5 Bus Arbitration 3.4.6 Bus Operations 3.5 EXAMPLE CPU CHIPS 3.5.1 The Intel Core i7 3.5.2 The Texas Instruments OMAP4430 System-on-a-Chip 3.5.3 The Atmel ATmega168 Microcontroller 3.6 EXAMPLE BUSES 3.6.1 The PCI Bus 3.6.2 PCI Express 3.6.3 The Universal Serial Bus 3.7 INTERFACING 3.7.1 I/O Interfaces 3.7.2 Address Decoding 3.8 SUMMARY CHAPTER 4 THE MICROARCHITECTURE LEVEL 4.1 AN EXAMPLE MICROARCHITECTURE 4.1.1 The Data Path 4.1.2 Microinstructions 4.1.3 Microinstruction Control: The Mic-1 4.2 AN EXAMPLE ISA: IJVM 4.2.1 Stacks 4.2.2 The IJVM Memory Model 4.2.3 The IJVM Instruction Set 4.2.4 Compiling Java to IJVM 4.3 AN EXAMPLE IMPLEMENTATION 4.3.1 Microinstructions and Notation 4.3.2 Implementation of IJVM Using the Mic-1 4.4 DESIGN OF THE MICROARCHITECTURE LEVEL 4.4.1 Speed versus Cost 4.4.2 Reducing the Execution Path Length 4.4.3 A Design with Prefetching: The Mic-2 4.4.4 A Pipelined Design: The Mic-3 4.4.5 A Seven-Stage Pipeline: The Mic-4 4.5 IMPROVING PERFORMANCE 4.5.1 Cache Memory 4.5.2 Branch Prediction 4.5.3 Out-of-Order Execution and Register Renaming 4.5.4 Speculative Execution 4.6 EXAMPLES OF. … (more)
- Edition:
- 6th ed., International ed
- Publisher Details:
- Harlow Boston : Pearson Education
- Publication Date:
- 2013
- Copyright Date:
- 2013
- Extent:
- 1 online resource (xxii, 775 pages), illustrations
- Subjects:
- 004.22
Computer organization
Computer architecture
Computer programming
Ordinateurs -- Conception et construction
Ordinateurs -- Architecture
Programmation (Informatique)
computer programming
COMPUTERS -- Computer Literacy
COMPUTERS -- Computer Science
COMPUTERS -- Data Processing
COMPUTERS -- Hardware -- General
COMPUTERS -- Information Technology
COMPUTERS -- Machine Theory
COMPUTERS -- Reference
Computer architecture
Computer organization
Computer programming
Electronic books
Electronic books - Languages:
- English
- ISBNs:
- 1299924557
9781299924550
9780273775331
0273775332 - Related ISBNs:
- 9780273769248
0273769243 - Notes:
- Note: Includes bibliographical references (pages 659-668) and index.
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- Legal Deposit; Only available on premises controlled by the deposit library and to one user at any one time; The Legal Deposit Libraries (Non-Print Works) Regulations (UK).
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