PIC16F1847 microcontroller-based programmable logic controller. Intermediate concepts / (2020)

• Record Type: Book
• Further Information: Note: Murat Uzam.
• Authors: Uzam, Murat, 1968-
• Contents: Chapter 1 - Arithmetical Macros; 1.1 Macro “R1addR2”; 1.2 Macro “R1addR2_16”; 1.3 Macro “RaddK”; 1.4 Macro “RaddK_16”; 1.5 Macro “R1subR2”; 1.6 Macro “R1subR2_16”; 1.7 Macro “RsubK”; 1.1 Macro “RsubK_16”; 1.9 Macro “R1mulR2”; 1.10 Macro “DivU16by8”; 1.11 Macro “incR”; 1.12 Macro “incR_16”; 1.13 Macro “decR”; 1.14 Macro “decR_16”; 1.15 Macro “Hbit_CNT” (High Bit Counter); 1.16 Macro “Lbit_CNT” (Low Bit Counter); 1.17 Examples for Arithmetical Macros Chapter 2 - Logical Macros; 2.1 Macro “R1andR2”; 2.2 Macro “RandK”; 2.3 Macro “R1nandR2”; 2.4 Macro “RnandK”; 2.5 Macro “R1orR2”; 2.6 Macro “RorK”; 2.7 Macro “R1norR2”; 2.8 Macro “RnorK”; 2.9 Macro “R1xorR2”; 2.10 Macro “RxorK”; 2.11 Macro “R1xnorR2”; 2.12 Macro “RxnorK” 2.13 Macro “invR”; 2.14 An Example for Logical Macros Chapter 3 - Shift and Rotate Macros; 3.1 Macro “Ashift_R” (Arithmetic Shift Right Rin); 3.2 Macro “Ashift_R_16” (Arithmetic Shift Right Rin); 3.3 Macro “Lshift_R” (Logical Shift Right Rin); 3.4 Macro “Lshift_R_16” (Logical Shift Right Rin); 3.5 Macro “Lshift_L” (Logical Shift Left Rin); 3.6 Macro “Lshift_L_16” (Logical Shift Left Rin); 3.7 Macro “shift_R” (Shift Right Rin); 3.8 Macro “shift_R_16” (Shift Right Rin); 3.9 Macro “shift_L” (Shift Left Rin); 3.10 Macro “shift_L_16” (Shift Left Rin); 3.11 Macro “rotate_R” (Rotate Right Rin); 3.12 Macro “rotate_R_16” (Rotate Right Rin); 3.13 Macro “rotate_L” (Rotate Left Rin); 3.14 Macro “rotate_L_16” (Rotate Left Rin); 3.15 Macro “Swap” (Swap Rin); 3.16 Examples for Shift and Rotate Macros Chapter 4 - Selection Macros 4.1 Macro “move_R” (Move) 4.2 Macro “load_R” (Load) 4.3 Macro “select” (Selection of One of Two 8-Bit Input Variables) 4.4 Macro “select_16” (Selection of One of Two 16-Bit Input Variables) 4.5 Macro “max_5” (Maximum in Five 8-Bit Variables) 4.6 Macro “max_10” (Maximum in Ten 8-Bit Variables) 4.7 Macro “max_ N80” (Maximum in N 8-Bit Variables, N = 2, 3, …, 80) 4.8 Macro “max_ N40_16” (Maximum in N 16-Bit Variables, N = 2, 3, …, 40) 4.9 Macro “max_ N255” (Maximum in N 8-Bit Variables, N = 2, 3, …, 255) 4.10 Macro “max_ N255_16” (Maximum in N 16-Bit Variables, N = 2, 3, …, 255) 4.11 Macro “min_5” (Minimum in Five 8-Bit Variables) 4.12 Macro “min_10” (Minimum in Ten 8-Bit Variables) 4.13 Macro “min_ N80” (Minimum in N 8-Bit Variables, N = 2, 3, …, 80) 4.14 Macro “min_ N40_16” (Minimum in N 16-Bit Variables, N = 2, 3, …, 40) 4.15 Macro “min_ N255” (Minimum in N 8-Bit Variables, N = 2, 3, …, 255) 4.16 Macro “min_ N255_16” (Minimum in N 16-Bit Variables, N = 2, 3, …, 255) 4.17 Macro “limiter” 4.18 Macro “limiter_16” 4.19 Multiplexer Macros 4.20 Macro “mux_2_1” (21 MUX) 4.21 Macro “mux_2_1_E” (21 MUX with Enable Input) 4.22 Macro “mux_4_1” (41 MUX) 4.23 Macro “mux_4_1_E” (41 MUX with Enable Input) 4.24 Macro “mux_8_1” (81 MUX) 4.25 Macro “mux_8_1_E” (81 MUX with Enable Input) 4.26 Macro “mux_16_1” (161 MUX) 4.27 Macro “mux_16_1_E” (161 MUX with Enable Input) 4.28 Macro “B_mux_2_1_E” (21 Byte Multiplexer with Enable Input) 4.29 Macro “B_mux_4_1_E” (41 Byte Multiplexer with Enable Input) 4.30 Macro “B_mux_8_1_E” (81 Byte Multiplexer with Enable Input) 4.31 Examples for Selection Macros Chapter 5 - Demultiplexer Macros; 5.1 Macro “Dmux_1_2” (12 DMUX); 5.2 Macro “Dmux_1_2_E” (12 DMUX with Enable Input); 5.3 Macro “Dmux_1_4” (14 DMUX); 5.4 Macro “Dmux_1_4_E” (14 DMUX with Enable Input); 5.5 Macro “Dmux_1_8” (18 DMUX); 5.6 Macro “Dmux_1_8_E” (18 DMUX with Enable Input); 5.7 Macro “Dmux_1_16” (116 DMUX); 5.8 Macro “Dmux_1_16_E” (116 DMUX with Enable Input); 5.9 Macro “B_Dmux_1_2_E” (12 Byte DeMultiplexer with Enable Input); 5.10 Macro “B_Dmux_1_4_E” (14 Byte DeMultiplexer with Enable Input); 5.11 Macro “B_Dmux_1_8_E” (18 Byte DeMultiplexer with Enable Input); 5.12 Macro “Dispatcher_1_8_E” (18 Dispatcher with Enable Input); 5.13 Macro “Patcher_8_1_E” (81 Patcher with Enable Input); 5.14 Examples for Demultiplexer Macros Chapter 6 - Decoder Macros (Available as E-Ancillaries); 6.1 Macro “decod_1_2” (12 Decoder with Active High Outputs); 6.2 Macro “decod_1_2_AL” (12 Decoder with Active Low Outputs); 6.3 Macro “decod_1_2_E” (12 Decoder with Active High Outputs and with Active High Enable Input); 6.4 Macro “decod_1_2_E_AL” (12 Decoder with Active Low Outputs and with Active High Enable Input); 6.5 Macro “decod_2_4” (24 Decoder with Active High Outputs); 6.6 Macro “decod_2_4_AL” (24 Decoder with Active Low Outputs); 6.7 Macro “decod_2_4_E” (24 Decoder with Active High Outputs and with Active High Enable Input); 6.8 Macro “decod_2_4_E_AL” (24 Decoder with Active Low Outputs and with Active High Enable Input); 6.9 Macro “decod_3_8” (38 Decoder with Active High Outputs); 6.10 Macro “decod_3_8_AL” (38 Decoder with Active Low Outputs); 6.11 Macro “decod_3_8_E” (38 Decoder with Active High Outputs and with Active High Enable Input); 6.12 Macro “decod_3_8_E_AL” (38 Decoder with Active Low Outputs and with Active High Enable Input); 6.13 Macro “decod_4_16” (416 Decoder with Active High Outputs); 6.14 Macro “decod_4_16_AL” (416 Decoder with Active Low Outputs); 6.15 Macro “decod_4_16_E” (416 Decoder with Active High Outputs and with Active High Enable Input); 6.16 Macro “decod_4_16_E_AL” (416 Decoder with Active Low Outputs and with Active High Enable Input); 6.17 Examples for Decoder Macros Chapter 7 - Priority Encoder Macros (Available as E-Ancillaries); 7.1 Macro “encod_4_2_p” (42 Priority Encoder with Active High Outputs); 7.2 Macro “encod_4_2_p_E” (42 Priority Encoder with Active High Outputs and; with Active High Enable Input) ; 7.3 Macro “encod_8_3_p” (83 Priority Encoder with Active High Outputs); 7.4 Macro “encod_8_3_p_E” (83 Priority Encoder with Active High Outputs and; with Active High Enable Input); 7.5 Macro “encod_dec_bcd_p” (Decimal to BCD Priority Encoder with Active High Outputs); 7.6 Macro “encod_dec_bcd_p_E” (Decimal to BCD Priority Encoder with Active; High Outputs and with Active High Enable Input Input); 7.7 Macro “encod_16_4_p” (164 Priority Encoder with Active High Outputs); 7.8 Macro “encod_16_4_p_E” (164 Priority Encoder with Active High Outputs and with Active High Enable Input); 7.9 Examples for Priority Encoder Macros Chapter 8 – Conversion Macros; 8.1 Macro “Conv_UsInt_2_BCD_U” (Unsigned Short Integer to Unpacked BCD Conversion); 8.2 Macro “Conv_UsInt_2_BCD_P” (Unsigned Short Integer to Packed BCD Conversion); 8.3 Macro “Conv_UInt_2_BCD_U” (Un
• Edition: 1st
• Publisher Details: Boca Raton : CRC Press
• Publication Date: 2020
• Extent: 1 online resource, illustrations (black and white)
• Subjects: 629.895; PIC microcontrollers
• Languages: English
• ISBNs: 9781000193923; 9781000193886; 9781000193909; 9780367506445
• Related ISBNs: 9780367506438
• Notes: Note: Description based on CIP data; resource not viewed.
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