Design and test strategies for 2D/3D integration for NoC-based multicore architectures. (©2020)

• Record Type: Book
• Further Information: Note: Kanchan Manna, Jimson Mathew.
• Other Names: Manna, Kanchan; Mathew, Jimson
• Contents: Intro -- Preface -- Contents -- 1 Introduction -- 1 System-on-Chip to Network-on-Chip: A Paradigm Shift -- 2 NoC-Based Multi-Core Systems with Three-Dimensional (3D) Integration Technology -- 3 Power and Temperature Issues in NoC-Based Multi-CoreSystems -- 4 Testing of NoC-Based Multi-Core Systems -- 5 Issues in Multi-Core Systems Design with Integrated NoC and 3D Technologies -- 6 Application Mapping and TSV Placement: A CombinedApproach -- 7 Swarm Based Optimizer -- 8 Scope and Motivation of the Works -- 9 Summary of This Book -- 10 Conclusion -- References -- 2 Alternative Approaches 1 Application Mapping Techniques -- 1.1 Dynamic Application Mapping Techniques -- 2 Static Application Mapping Techniques -- 2.1 Exact Application Mapping Techniques -- 2.2 Search-Based Application Mapping Techniques -- 2.2.1 Deterministic Search-Based Application Mapping Techniques -- 2.2.2 Heuristic Search-Based Application Mapping Techniques -- 2.2.3 Constructive Heuristics Techniques -- 3 Application Mapping Together with TSV Placement for 3D NoC-Based Multi-Core Systems -- 4 Thermal Management Techniques for NoC-Based Multi-Core Systems 5 Thermal-Aware Testing of NoC-Based Multi-Core Systems -- 6 Conclusion -- References -- 3 Iterative Application Mapping with TSV Placement Strategy for Design a 3D NoC-Based Multi-Core Systems -- 1 3D NoC-Based Systems and Routing Algorithm -- 2 TSV Placement and Application Mapping Strategy -- 3 Partitioning Algorithm -- 4 Application Mapping onto Mesh-Based 3D NoC Systems -- 4.1 Initial Mapping Phase -- 4.2 Iterative Improvement Phase -- 5 Experimental Results and Analysis -- 5.1 Results on Different TSV Distributions and MappingStrategies -- 5.2 Impact of TSV Position Selection 5.3 Dynamic Performance of Different Mapping and TSV Configurations -- 6 Conclusion -- References -- 4 A Constructive Heuristic for Designing a 3D NoC-Based Multi-Core Systems -- 1 Proposed Heuristic for TSV Placement and Application Mapping -- 1.1 Algorithm Philosophy -- 2 Experimental Results and Analysis -- 2.1 Results on Different TSV Distributions and MappingStrategies -- 2.2 Impact of TSV Position Selection -- 2.3 Dynamic Performance of Different Mapping and TSV Configurations -- 3 Conclusion -- References 5 A Discrete Particle Swarm Optimization Technique for Designing a 3D NoC-Based Multi-Core Systems -- 1 ILP Formulation for TSV Placement and Application Mapping -- 1.1 Objective Function -- 1.2 Constraints -- 2 PSO Formulation for TSV Placement and Application Mapping -- 2.1 Particle Formulation and Fitness Function -- 2.1.1 Particle Structure -- 2.1.2 Local and Global Best Particle -- 2.1.3 Evolution of the Generation -- 2.1.4 Swap Operator -- 2.1.5 Swap Sequence -- 2.2 Augmentation to the Basic PSO -- 2.2.1 Usage of Better Random Number Generator -- 2.2.2 Inversion Mutation (IM)
• Publisher Details: Cham : Springer
• Publication Date: 2020
• Copyright Date: 2020
• Extent: 1 online resource (167 pages)
• Subjects: 621.3815/31; Networks on a chip -- Design; Networks on a chip -- Testing; Electronic circuits; Electronics; Microelectronics; Microprocessors; Electronic books
• Languages: English
• ISBNs: 9783030313104; 3030313107
• Related ISBNs: 9783030313098; 3030313093
• Notes: Note: Includes bibliographical references and index.; Note: Print version record.
• Access Rights: Legal Deposit; Only available on premises controlled by the deposit library and to one user at any one time; The Legal Deposit Libraries (Non-Print Works) Regulations (UK).
• Access Usage: Restricted: Printing from this resource is governed by The Legal Deposit Libraries (Non-Print Works) Regulations (UK) and UK copyright law currently in force.