Neuro-inspired computing using resistive synaptic devices. (2017)
- Record Type:
- Book
- Title:
- Neuro-inspired computing using resistive synaptic devices. (2017)
- Main Title:
- Neuro-inspired computing using resistive synaptic devices
- Further Information:
- Note: Shimeng Yu, editor.
- Editors:
- (Electrical engineer), Yu, Shimeng
- Contents:
- Preface; Acknowledgments; Contents; About the Editor; Chapter 1: Introduction to Neuro-Inspired Computing Using Resistive Synaptic Devices; 1.1 The Demand for New Hardware Beyond von Neumann Architecture; 1.2 Neuromorphic Hardware Accelerators and Why Resistive Synaptic Devices?; 1.3 Desirable Characteristics of Resistive Synaptic Devices; 1.4 Crossbar Array Architecture for Accelerating Weighted Sum and Weight Update; 1.5 Challenges of Mapping Learning Algorithms to Neuromorphic Hardware; References; Part I: Device-Level Demonstrations of Resistive Synaptic Devices. Chapter 2: Synaptic Devices Based on Phase-Change Memory2.1 PCM Basics for Synaptic Devices; 2.1.1 Device Operation; 2.1.2 Phase-Change Materials; 2.1.3 Threshold Switching Mechanism; 2.1.4 Resistance Drift; 2.1.5 Scaling; 2.1.6 Array Architecture and Memory Cell Selector; 2.1.7 Power Consumption; 2.2 PCM Synaptic Device Implementations; 2.2.1 PCM as an Electronic Synapse; 2.2.2 Synaptic Plasticity and Learning; 2.2.3 Pulse Schemes for Plasticity; 2.2.4 Gradual Programming Versus Stochastic Programming; 2.3 Future Outlook; 2.3.1 Resistance State Stability; 2.3.2 New Materials Exploration. 2.3.3 Ovonic Threshold SwitchReferences; Chapter 3: Pr0.7Ca0.3MnO3 (PCMO)-Based Synaptic Devices; 3.1 Nanoscale PCMO-Based Synaptic Device; 3.2 Reactive Electrode Dependence of PCMO-Based Synaptic Device; 3.3 Nitrogen Treatment for Tunable Synaptic Characteristics; 3.4 Approaches to Improve Synaptic Characteristics; 3.5 SummaryPreface; Acknowledgments; Contents; About the Editor; Chapter 1: Introduction to Neuro-Inspired Computing Using Resistive Synaptic Devices; 1.1 The Demand for New Hardware Beyond von Neumann Architecture; 1.2 Neuromorphic Hardware Accelerators and Why Resistive Synaptic Devices?; 1.3 Desirable Characteristics of Resistive Synaptic Devices; 1.4 Crossbar Array Architecture for Accelerating Weighted Sum and Weight Update; 1.5 Challenges of Mapping Learning Algorithms to Neuromorphic Hardware; References; Part I: Device-Level Demonstrations of Resistive Synaptic Devices. Chapter 2: Synaptic Devices Based on Phase-Change Memory2.1 PCM Basics for Synaptic Devices; 2.1.1 Device Operation; 2.1.2 Phase-Change Materials; 2.1.3 Threshold Switching Mechanism; 2.1.4 Resistance Drift; 2.1.5 Scaling; 2.1.6 Array Architecture and Memory Cell Selector; 2.1.7 Power Consumption; 2.2 PCM Synaptic Device Implementations; 2.2.1 PCM as an Electronic Synapse; 2.2.2 Synaptic Plasticity and Learning; 2.2.3 Pulse Schemes for Plasticity; 2.2.4 Gradual Programming Versus Stochastic Programming; 2.3 Future Outlook; 2.3.1 Resistance State Stability; 2.3.2 New Materials Exploration. 2.3.3 Ovonic Threshold SwitchReferences; Chapter 3: Pr0.7Ca0.3MnO3 (PCMO)-Based Synaptic Devices; 3.1 Nanoscale PCMO-Based Synaptic Device; 3.2 Reactive Electrode Dependence of PCMO-Based Synaptic Device; 3.3 Nitrogen Treatment for Tunable Synaptic Characteristics; 3.4 Approaches to Improve Synaptic Characteristics; 3.5 Summary and Outlook; References; Chapter 4: TaOx-/TiO2-Based Synaptic Devices; 4.1 Device Fabrication Method; 4.2 Basic Device Characteristics; 4.3 Switching Mechanism; 4.3.1 Experimental Findings; 4.3.2 Physical Modeling; 4.4 Synaptic Function Realization and Modeling Results. 4.4.1 Potentiation and Depression4.4.2 Spike-Timing-Dependent Plasticity; 4.4.3 Paired-Pulse Facilitation; 4.5 3D Synaptic Network; 4.5.1 3D Synaptic Network Realization; 4.5.2 Linearity Tuning; 4.6 Summary and Outlook; References; Part II: Array-Level Demonstrations of Resistive Synaptic Devices and Neural Networks; Chapter 5: Training and Inference in Hopfield Network Using 10x10 Phase Change Synaptic Array; 5.1 Introduction; 5.2 Phase Change Memory Array for Synaptic Operation; 5.3 Hebbian Learning in Synaptic Array. 5.4 Effects of Device-to-Device Variation on Associative Learning Performance5.5 Summary; References; Chapter 6: Experimental Demonstration of Firing Rate Neural Networks Based on Metal-Oxide Memristive Crossbars; 6.1 Introduction; 6.2 Memristive Devices and Crossbar Circuits; 6.2.1 Device Fabrication and Forming; 6.2.2 Dynamic Characteristics; 6.3 Single-Layer Perceptron; 6.3.1 Inference; 6.3.2 Network Training; 6.4 Multilayer Perceptron; 6.5 3D Memristor-CMOS Hybrid Circuits; 6.6 Challenges and Future Work; References. … (more)
- Publisher Details:
- Cham, Switzerland : Springer
- Publication Date:
- 2017
- Extent:
- 1 online resource (xi, 269 pages), illustrations (some color)
- Subjects:
- 006.3/2
Neural computers
COMPUTERS -- General
Neural computers
Engineering
Circuits and Systems
Electronic Circuits and Devices
Processor Architectures
Electronic books - Languages:
- English
- ISBNs:
- 9783319543130
- Related ISBNs:
- 331954313X
9783319543123
3319543121 - Notes:
- Note: Includes bibliographical references at the end of each chapters.
Note: Online resource; title from PDF title page (SpringerLink, viewed April 27, 2017). - Access Rights:
- Legal Deposit; Only available on premises controlled by the deposit library and to one user at any one time; The Legal Deposit Libraries (Non-Print Works) Regulations (UK).
- Access Usage:
- Restricted: Printing from this resource is governed by The Legal Deposit Libraries (Non-Print Works) Regulations (UK) and UK copyright law currently in force.
- View Content:
- Available online (eLD content is only available in our Reading Rooms) ↗
- Physical Locations:
- British Library HMNTS - ELD.DS.429767
- Ingest File:
- 02_545.xml