Approximate circuits : methodologies and CAD /: methodologies and CAD. ([2019])

• Record Type: Book
• Further Information: Note: Sherief Reda, Muhammad Shafique, editors.
• Editors: Reda, Sherief; Shafique, Muhammad
• Contents: Intro; Preface: Introduction to Approximate Circuits: Methodologies and CAD; Introduction; Application Domains; Quality-of-Result Error Metrics; Approximate Circuits: Methodologies and CAD; Approximate Arithmetic Building Blocks; Approximate Circuit Synthesis; Approximate Accelerator Design; Approximate CPU and GPU Design; References; Contents; Contributors; Part I Approximate Arithmetic Circuit; 1 Configurable Models and Design Space Exploration for Low-Latency Approximate Adders; 1.1 Introduction to Low-Latency Adders; 1.2 Generic Accuracy Configurable Adder Models; 1.2.1 GeAr Adder Model 1.2.2 QuAd Adder Model1.3 Design Space Exploration of Low-Latency Adders for Uniformly Distributed Inputs; 1.3.1 Early Design Space Reduction; 1.3.2 Quality-Area Optimal QuAd Adder Configuration; 1.4 Experimental Results; 1.4.1 Design Space Coverage and Exploration; 1.4.2 Performance in Real-World Applications; 1.5 Conclusion; 1.6 Open-Source Libraries; References; 2 Approximate Multipliers and Dividers Using DynamicBit Selection; 2.1 Introduction; 2.2 Approximate Arithmetic Methodology; 2.2.1 Approximate Multiplier Design; 2.2.2 Approximate Divider Design 2.2.3 Support for Negative Arithmetic2.3 Experimental Results; 2.3.1 The Approximate Multiplier; 2.3.1.1 Standalone Multiplier Results; 2.3.1.2 Multiplier-Based Application Results; 2.3.2 The Approximate Divider Results; 2.3.2.1 Standalone Divider Results; 2.3.2.2 Divider-Based Application Results; 2.4 Conclusion; References; 3 Heterogeneous Approximate Multipliers: Architecturesand Design Methodologies; 3.1 Introduction; 3.2 State-of-the-art Approximate Multipliers; 3.3 Design Space Coverage of Approximate Multipliers; 3.3.1 Design Space Dimensioning 3.4 Methodology for Design Space Generation and Exploration3.4.1 Developing Approximate Elementary Modules; 3.4.2 Early Design Space Pruning; 3.4.3 Generating Larger Multiplier Blocks; 3.4.4 Selection Methodology; 3.5 Results and Discussion; 3.6 Conclusion; References; 4 Approximate Arithmetic Circuits: Design and Evaluation; 4.1 Introduction; 4.2 Approximate Adders; 4.2.1 Classification; 4.2.1.1 Speculative Adders; 4.2.1.2 Segmented Adders; 4.2.1.3 Carry Select Adders; 4.2.1.4 Approximate Full Adders; 4.2.2 Evaluation; 4.2.2.1 Error Characteristics; 4.2.2.2 Circuit Measurements 4.2.2.3 Discussion4.3 Approximate Multipliers; 4.3.1 Classification; 4.3.1.1 Approximation in Generating Partial Products; 4.3.1.2 Approximation in the Partial Product Tree; 4.3.1.3 Using Approximate Counters or Compressors in the Partial Product Tree; 4.3.1.4 Approximate Booth Multipliers; 4.3.2 Evaluation; 4.3.2.1 Error Characteristics; 4.3.2.2 Circuit Measurements; 4.3.2.3 Discussion; 4.4 Approximate Dividers; 4.4.1 Classification; 4.4.1.1 Approximate Array Dividers; 4.4.1.2 Curve Fitting-Based Approximate Dividers; 4.4.1.3 Rounding-Based Approximate Dividers; 4.4.2 Evaluation 4.4.2.1 Error Characteristics
• Publisher Details: Cham, Switzerland : Springer
• Publication Date: 2019
• Extent: 1 online resource (495 pages)
• Subjects: 005.1; Computer algorithms; Embedded computer systems; Approximation theory; Approximation theory; Computer algorithms; Embedded computer systems; Electronic books
• Languages: English
• ISBNs: 9783319993225; 3319993224
• Related ISBNs: 9783319993218
• Notes: Note: Includes bibliographical references and index.; Note: Description based on online resource; title from digital title page (viewed on January 25, 2019).
• Access Rights: Legal Deposit; Only available on premises controlled by the deposit library and to one user at any one time; The Legal Deposit Libraries (Non-Print Works) Regulations (UK).
• Access Usage: Restricted: Printing from this resource is governed by The Legal Deposit Libraries (Non-Print Works) Regulations (UK) and UK copyright law currently in force.