In search of the next memory : inside the circuitry from the oldest to the emerging non-volatile memories /: inside the circuitry from the oldest to the emerging non-volatile memories. (2017)
- Record Type:
- Book
- Title:
- In search of the next memory : inside the circuitry from the oldest to the emerging non-volatile memories /: inside the circuitry from the oldest to the emerging non-volatile memories. (2017)
- Main Title:
- In search of the next memory : inside the circuitry from the oldest to the emerging non-volatile memories
- Further Information:
- Note: Roberto Gastaldi, Giovanni Campardo, editors.
- Editors:
- Gastaldi, Roberto
Campardo, Giovanni - Contents:
- Preface; Contents; Editors and Contributors; 1 Introduction; References; 2 Historical Overview of Solid-State Non-Volatile Memories; 1 The Story; References; 3 Physics and Technology of Emerging Non-Volatile Memories; 1 Challenges in Floating-Gate Memory Scaling; 2 The Future of the Floating-Gate Concept; 2.1 System-Level Management Techniques; 2.2 Dielectric-Materials Engineering; 2.3 Novel Flash Architectures; 3 Alternative Storage Concepts; 3.1 Ferroelectric Memories; 3.2 Magneto-Resistive Memories; 3.3 Phase-Change Memories; 3.4 Resistive RAM. 4 Scaling Path and Issues in Various Emerging ArchitecturesReferences; 4 Performance Demands for Future NVM; 1 Introduction; 2 Evolution of NAND; 3 Exploiting the 3rd Dimension: 3D NAND; 4 Breakthrough Approach: Emerging Memories; 4.1 Phase Change Memories (PCM); 4.2 Resistive RAMs (ReRAM); 4.3 The Challenge of Dram Replacement: STT-RAM and FeRAM; 4.4 Ferroelectric Memories (FeRAM); 4.5 Final Considerations; References; 5 Array Organization in Emerging Memories; 1 Introduction; 2 PCM and Array Organization for Unipolar Operation; 3 Bipolar-Operation Array Organization. 4 Ferroelectric Memory Architecture5 Cross-Point Array; 6 Write Circuits; 6.1 Introduction; 6.2 Writing PCM Memories; 6.3 Writing ReRAM (Bipolar) and STT-MRAM; 7 Redundancy; 7.1 Introduction; 7.2 Redundancy Schematic; References; 6 Data Sensing in Emerging NVMs; 1 Introduction; 2 Sensing Concept in Flash and DRAM Memory; 3 The Concept of Read Window; 3.1 SensingPreface; Contents; Editors and Contributors; 1 Introduction; References; 2 Historical Overview of Solid-State Non-Volatile Memories; 1 The Story; References; 3 Physics and Technology of Emerging Non-Volatile Memories; 1 Challenges in Floating-Gate Memory Scaling; 2 The Future of the Floating-Gate Concept; 2.1 System-Level Management Techniques; 2.2 Dielectric-Materials Engineering; 2.3 Novel Flash Architectures; 3 Alternative Storage Concepts; 3.1 Ferroelectric Memories; 3.2 Magneto-Resistive Memories; 3.3 Phase-Change Memories; 3.4 Resistive RAM. 4 Scaling Path and Issues in Various Emerging ArchitecturesReferences; 4 Performance Demands for Future NVM; 1 Introduction; 2 Evolution of NAND; 3 Exploiting the 3rd Dimension: 3D NAND; 4 Breakthrough Approach: Emerging Memories; 4.1 Phase Change Memories (PCM); 4.2 Resistive RAMs (ReRAM); 4.3 The Challenge of Dram Replacement: STT-RAM and FeRAM; 4.4 Ferroelectric Memories (FeRAM); 4.5 Final Considerations; References; 5 Array Organization in Emerging Memories; 1 Introduction; 2 PCM and Array Organization for Unipolar Operation; 3 Bipolar-Operation Array Organization. 4 Ferroelectric Memory Architecture5 Cross-Point Array; 6 Write Circuits; 6.1 Introduction; 6.2 Writing PCM Memories; 6.3 Writing ReRAM (Bipolar) and STT-MRAM; 7 Redundancy; 7.1 Introduction; 7.2 Redundancy Schematic; References; 6 Data Sensing in Emerging NVMs; 1 Introduction; 2 Sensing Concept in Flash and DRAM Memory; 3 The Concept of Read Window; 3.1 Sensing Resistance Variations in Memory Cells; 4 Sensing in STT-MRAM; 5 Sensing in Ferroelectric Memories; References; 7 Algorithms to Survive: Programming Operation in Non-Volatile Memories. 1 Why Algorithms to Write and Erase Non-volatile Memories?2 Introduction to Flash Algorithms; 3 Write Algorithms for PCMs; 3.1 Introduction; 3.2 Bi-level Programming; 3.3 Multi-level Programming; 4 Phase Distribution in ML Programming; 4.1 Drift Dependence on Programmed Resistance; 4.2 Temperature Dependence on Programmed Resistance; 5 Write Algorithms for ReRAMs; 5.1 ReRAM Technology Overview; 5.2 ReRAM Cell Configuration; 5.3 The Stochastic Variability Problem in ReRAM; 5.4 ReRAM Program Algorithm, an ISPP Implementation; Acknowledgements; References; 8 Error Management. 1 The Role of ECC for Mainstream and Emerging Memory2 Basics of Error Correcting Codes; 2.1 Linear Block Codes-Basic Facts; 2.2 Linear Block Codes Matrix Description; 2.3 Error Correction Performance of Linear Block Codes; 2.4 Code Modifications; 2.5 Technology-Independent Estimates; 3 Interesting Codes; 3.1 Single-Parity-Check Codes; 3.1.1 Definition; 3.1.2 Implementation; 3.2 Hamming Codes; 3.2.1 Definition; 3.2.2 Decoding; 3.2.3 Fully Parallel Implementation; 3.3 BCH Codes; 3.3.1 Primer on Finite Fields; 3.3.2 Definition; 3.3.3 Decoding; 3.3.4 Implementation of BM Decoding. … (more)
- Publisher Details:
- Cham, Switzerland : Springer
- Publication Date:
- 2017
- Extent:
- 1 online resource (xviii, 247 pages), illustrations
- Subjects:
- 621.39/73
620
Engineering
Nonvolatile random-access memory
TECHNOLOGY & ENGINEERING -- Electronics -- General
Nonvolatile random-access memory
Engineering
Circuits and Systems
Memory Structures
Semiconductors
Electronics and Microelectronics, Instrumentation
Computers -- Hardware -- General
Technology & Engineering -- Electronics -- Semiconductors
Storage media & peripherals
Semi-conductors & super-conductors
Electronics engineering
Systems engineering
Memory management (Computer science)
Electronics
Technology & Engineering -- Electronics -- Circuits -- General
Circuits & components
Electronic books
Electronic book - Languages:
- English
- ISBNs:
- 9783319477244
3319477242 - Related ISBNs:
- 9783319477220
3319477226 - Notes:
- Note: Online resource; title from PDF title page (SpringerLink, viewed March 22, 2017).
- Access Rights:
- Legal Deposit; Only available on premises controlled by the deposit library and to one user at any one time; The Legal Deposit Libraries (Non-Print Works) Regulations (UK).
- Access Usage:
- Restricted: Printing from this resource is governed by The Legal Deposit Libraries (Non-Print Works) Regulations (UK) and UK copyright law currently in force.
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- Available online (eLD content is only available in our Reading Rooms) ↗
- Physical Locations:
- British Library HMNTS - ELD.DS.373361
- Ingest File:
- 02_352.xml