Trusted digital circuits : hardware trojan vulnerabilities, prevention and detection /: hardware trojan vulnerabilities, prevention and detection. ([2018])
- Record Type:
- Book
- Title:
- Trusted digital circuits : hardware trojan vulnerabilities, prevention and detection /: hardware trojan vulnerabilities, prevention and detection. ([2018])
- Main Title:
- Trusted digital circuits : hardware trojan vulnerabilities, prevention and detection
- Further Information:
- Note: Hassan Salmani.
- Authors:
- Salmani, Hassan
- Contents:
- Intro; Preface; Contents; 1 The Global Integrated Circuit Supply Chain Flow and the Hardware Trojan Attack; 1.1 The Global Integrated Circuit Supply Chain; 1.2 The Hardware Trojan Attack; 1.3 Conclusions; References; 2 Circuit Vulnerabilities to Hardware Trojans at the Register-Transfer Level; 2.1 Circuits at the Register-Transfer Level; 2.2 Value Range Analyses for Vulnerability Assessments; 2.2.1 Statement Analysis; 2.2.2 Observerability Analysis; 2.2.3 Application of Value Range-Based Vulnerability Analysis; 2.3 Unspecified IP Functionality; 2.3.1 Hardware Trojans in Don't Cares. 2.3.2 Dangerous Don't Cares Identification2.4 Formal Verification and Coverage Analysis for Vulnerability Analyses; 2.5 Conclusions; References; 3 Design Techniques for Hardware Trojans Prevention and Detection at the Register-Transfer Level; 3.1 Hardware Trojan Prevention at the Register-Transfer Level; 3.1.1 Dual Modular Redundant Schedule at High-Level Synthesis; 3.1.2 Proof-Carrying Hardware; 3.2 Hardware Trojan Detection at the Register-Transfer Level; 3.2.1 Control-Flow Subgraph Matching; 3.3 Conclusions; References; 4 Circuit Vulnerabilities to Hardware Trojans at the Gate Level. 4.1 Circuits at the Gate-Level4.2 Analyzing Vulnerabilities Based on Functional Analyses; 4.3 Analyzing Vulnerabilities Based on Structural and Parametric Analyses; 4.3.1 Hardware Trojan Ranking; 4.4 Analyzing Vulnerabilities in Finite State Machines and Design-for-Test Structures; 4.5 Conclusions; References; 5Intro; Preface; Contents; 1 The Global Integrated Circuit Supply Chain Flow and the Hardware Trojan Attack; 1.1 The Global Integrated Circuit Supply Chain; 1.2 The Hardware Trojan Attack; 1.3 Conclusions; References; 2 Circuit Vulnerabilities to Hardware Trojans at the Register-Transfer Level; 2.1 Circuits at the Register-Transfer Level; 2.2 Value Range Analyses for Vulnerability Assessments; 2.2.1 Statement Analysis; 2.2.2 Observerability Analysis; 2.2.3 Application of Value Range-Based Vulnerability Analysis; 2.3 Unspecified IP Functionality; 2.3.1 Hardware Trojans in Don't Cares. 2.3.2 Dangerous Don't Cares Identification2.4 Formal Verification and Coverage Analysis for Vulnerability Analyses; 2.5 Conclusions; References; 3 Design Techniques for Hardware Trojans Prevention and Detection at the Register-Transfer Level; 3.1 Hardware Trojan Prevention at the Register-Transfer Level; 3.1.1 Dual Modular Redundant Schedule at High-Level Synthesis; 3.1.2 Proof-Carrying Hardware; 3.2 Hardware Trojan Detection at the Register-Transfer Level; 3.2.1 Control-Flow Subgraph Matching; 3.3 Conclusions; References; 4 Circuit Vulnerabilities to Hardware Trojans at the Gate Level. 4.1 Circuits at the Gate-Level4.2 Analyzing Vulnerabilities Based on Functional Analyses; 4.3 Analyzing Vulnerabilities Based on Structural and Parametric Analyses; 4.3.1 Hardware Trojan Ranking; 4.4 Analyzing Vulnerabilities in Finite State Machines and Design-for-Test Structures; 4.5 Conclusions; References; 5 Design Techniques for Hardware Trojans Prevention and Detection at the Gate Level; 5.1 Hardware Trojan Prevention at the Gate Level; 5.1.1 Information Flow Tracking for Hardware Trojan Prevention; 5.2 Hardware Trojan Detection at the Gate Level. 5.2.1 Signal Correlation-Based Clustering for Hardware Trojan Detection5.2.2 Score-Based Classification for Hardware Trojans Detection; 5.2.3 The Controllability and Observability Hardware Trojan Detection (COTD); 5.2.3.1 Complexity: COTD vs. Some Existing Techniques; 5.2.3.2 Simulation Analyses; 5.3 Conclusions; References; 6 Circuit Vulnerabilities to Hardware Trojan at the Layout Level; 6.1 Circuits at the Layout Level; 6.2 Motivation; 6.3 Layout Vulnerability Analysis Flow; 6.3.1 Cell and Routing Analyses; 6.3.2 Net Analysis; 6.4 Simulation Results; 6.5 Conclusions; References. 7 Design Techniques for Hardware Trojans Prevention and Detection at the Layout Level7.1 Hardware Trojan Prevention at the Layout Level; 7.1.1 Dummy Scan Flip-flop Insertion and Layout-Aware Scan Cell Reordering; 7.1.2 Ring Oscillator Network; 7.1.3 Trojan Prevention and Detection (TPAD) Technique; 7.1.4 Infrastructure IP for Security (IIPS) Technique; 7.2 Hardware Trojan Detection at the Layout Level; 7.2.1 The Current Integration Technique; 7.2.2 Delay-Based Hardware Trojan Detection Using Shadow Registers; 7.2.3 Temperature-Based Hardware Trojan Detection. … (more)
- Publisher Details:
- Cham, Switzerland : Springer
- Publication Date:
- 2018
- Copyright Date:
- 2018
- Extent:
- 1 online resource
- Subjects:
- 005.8
Engineering
Hardware Trojans (Computers) -- Prevention
Computer security
COMPUTERS -- Security -- Viruses & Malware
Engineering
Circuits and Systems
Processor Architectures
Systems and Data Security
Computer security
Computers -- Systems Architecture -- General
Computers -- Security -- General
Computer architecture & logic design
Computer security
Systems engineering
Computer science
Data protection
Technology & Engineering -- Electronics -- Circuits -- General
Circuits & components
Electronic books - Languages:
- English
- ISBNs:
- 9783319790817
3319790811 - Related ISBNs:
- 9783319790800
3319790803 - Notes:
- Note: Includes bibliographical references.
Note: Online resource; title from PDF title page (EBSCO, viewed April 25, 2018). - Access Rights:
- Legal Deposit; Only available on premises controlled by the deposit library and to one user at any one time; The Legal Deposit Libraries (Non-Print Works) Regulations (UK).
- Access Usage:
- Restricted: Printing from this resource is governed by The Legal Deposit Libraries (Non-Print Works) Regulations (UK) and UK copyright law currently in force.
- View Content:
- Available online (eLD content is only available in our Reading Rooms) ↗
- Physical Locations:
- British Library HMNTS - ELD.DS.343591
- Ingest File:
- 01_295.xml