Introduction to Logic Design. (1998)

• Record Type: Book
• Further Information: Note: Sajjan G. Shiva.
• Authors: Shiva, Sajjan G
• Contents: Cover; Half Title; Title Page; Copyright Page; Dedication; Preface; Contents; 1 Number Systems and Codes; 1.1 Digital System Organization; 1.2 Number Systems; 1.2.1 Binary System; 1.2.2 Octal System; 1.2.3 Hexadecimal System; 1.3 Conversion; 1.3.1 Radix Division Technique; 1.3.2 Radix Multiply Technique; 1.3.3 Base 2k Conversion; 1.4 Arithmetic; 1.4.1 Binary Arithmetic; 1.4.2 Octal Arithmetic; 1.4.3 Hexadecimal Arithmetic; 1.5 Representation of Negative Numbers; 1.5.1 Sign-Magnitude System; 1.5.2 Complement Number System; 1.5.3 Shifting Revisited; 1.5.4 Comparison of Complement Systems 1.6 Floating-Point Numbers1.7 Binary Codes; 1.7.1 Weighted Codes; 1.7.2 Nonweighted Codes; 1.7.3 Error Detection Codes; 1.7.4 Alphanumeric Codes; 1.8 Data Storage and Register Transfer; 1.9 Summary; References; Problems; 2 Boolean Algebra; 2.1 Logic Circuits; 2.1.1 Signals and Gates; 2.2 Boolean Algebra; 2.3 Two-Valued Boolean Algebra; 2.4 Properties of Boolean Algebra; 2.4.1 Operator Hierarchy; 2.4.2 Equality of Expressions; 2.4.3 Duality; 2.5 Functions and Their Representations; 2.5.1 Truth Tables; 2.5.2 Venn Diagrams; 2.5.3 Algebraic Representations; 2.6 Theorems 2.6.1 Expansion to Canonical Forms2.6.2 Proving the Equality of Expressions; 2.6.3 Simplifying Boolean Functions; 2.7 Other Operations; 2.7.1 A Functionally Complete Set of Operators; 2.8 Multiple-Input Gates and Logic Circuits; 2.9 Integrated Circuits; 2.9.1 Positive and Negative Logic; 2.9.2 Signal Inversion; 2.10 Current Trends; 2.10.1 Multivalued Logic; 2.10.2 Fuzzy Logic; 2.11 Summary; References; Problems; 3 Minimization of Boolean Functions; 3.1 K-tnaps; 3.1.1 Representation of Functions on K-maps; 3.1.2 Plotting the SOP Form; 3.1.3 Plotting the POS Form; 3.1.4 Minimization 3.2 Incompletely Specified Functions3.3 Quine-McCluskey Procedure; 3.3.1 Covering Problem; 3.3.2 Multiple-Output Functions; 3.4 CAD Tools for Simplification; 3.5 Summary; References; Problems; 4 Combinational Circuits; 4.1. Introduction; 4.2 Functional Analysis; 4.3 Design; 4.3.1 AND-O.R Circuits; 4.3.2 OR-AND Circuits; 4.3.3 NAND-NAND Circuits; 4.3.4 NOR NOR Circuits; 4.4 Other Two-Level Circuits; 4.5 EXCLUSIVE-OR and EQUIVALENCE; 4.6 Multiple-Level Circuits Revisited; 4.7 Timing Analysis; 4.7.1 Hazards; 4.8 Loading Analysis; 4.9 Designing with ICs; 4.9 Designing with ICs; 4.9.1 Special ICs 4.10 SummaryReferences; Problems; 5 Popular Combinational Circuits; 5.1 Introduction; 5.2 Adders; 5.2.1 Parallel Binary Adder (PBA); 5.2.2 Carry Lookahead Adder (CLA); 5.2.3 Off-the-Shelf Adders; 5.2.4 Decimal Adder; 5.3 Magnitude Comparators; 5.4 Shifters; 5.5 Arithmetic/Logic Units (ALUs); 5.6 Multipliers; 5.7 Decoders; 5.8 Code Converters; 5.9 Encoders; 5.10 Multiplexers; 5.11 Demultiplexers; 5.12 Majority Circuits; 5.13 Modular Design Methodology; 5.14 Summary; References; Problems; 6 Synchronous Sequential Circuits; 6.1 Introduction; 6.2 Flip-Flops; 6.2.1 Set-Reset (SR) Flip-Flops
• Edition: Second edition
• Publisher Details: Boca Raton, FL : CRC Press
• Publication Date: 1998
• Extent: 1 online resource
• Subjects: 621.39/5; Electronics; Electronics; Electronic books
• Languages: English
• ISBNs: 9781482289848; 1482289849
• Related ISBNs: 0824700821
• Access Rights: Legal Deposit; Only available on premises controlled by the deposit library and to one user at any one time; The Legal Deposit Libraries (Non-Print Works) Regulations (UK).
• Access Usage: Restricted: Printing from this resource is governed by The Legal Deposit Libraries (Non-Print Works) Regulations (UK) and UK copyright law currently in force.