Logic design of nanoICs. (2017)

• Record Type: Book
• Further Information: Note: Svetlana N. Yanushkevich, Vlad P. Shmerko, Sergey E. Lyshevski.
• Other Names: Yanushkevich, Svetlana N; Lyshevski, Sergey Edward; Shmerko, Vlad P
• Contents: PREFACE; ACKNOWLEDGEMENTS; INTRODUCTION; Progress From Micro- to Nanoelectronics; Logic Design in Spatial Dimensions; Towards Computer-Aided Design of NanoICs; Methodology; Example: Hypercube Structure of Hierarchical FPGA; Summary; Problems; Further Reading; References; NANOTECHNOLOGIES; Nanotechnologies; Nanoelectronic Devices; Digital Nanoscale Circuits: Gates vs. Arrays; Molecular Electronics; Scaling and Fabrication; Summary; Problems; Further Reading; References; BASICS OF LOGIC DESIGN IN NANOSPACE; Graphs; Data Structures for Switching Functions; Sum-of-Products Expressions; Shannon Decision Trees and Diagrams; Reed-Muller Expressions; Decision Trees and Diagrams; Arithmetic Expressions; Decision Trees and Diagrams; Summary; Problems; Further Reading; References; WORD-LEVEL DATA STRUCTURES; Word-level Data Structures; Word-level Arithmetic Expressions; Word-level Sum-of-Products Expressions; Word-level Reed-Muller Expressions; Summary; Problems; Further Reading; References; NANOSPACE AND HYPERCUBE-LIKE DATA STRUCTURES; Spatial Structures; Hypercube Data Structure; Assembling of Hypercubes; N-Hypercube Definition; Degree of Freedom and Rotation; Coordinate Description; N-Hypercube Design for n > 3 Dimensions; Embedding a Binary Decision Tree in N-Hypercube; Assembling; Spatial Topological Measurements; Summary; Problems; Further Reading; References; NANODIMENSIONAL MULTILEVEL CIRCUITS; Graph-Based Models in Logic Design of Multilevel Networks; Library of N-Hypercubes for Elementary Logic Functions; Hybrid Design Paradigm: N-Hypercube and DAG; Manipulation of N-Hypercubes; Numerical Evaluation of 3-D Structures; Summary; Further Reading; References; LINEAR WORD-LEVEL MODELS OF MULTILEVEL CIRCUITS; Linear Expressions; Linear Arithmetic Expressions; Linear Arithmetic Expressions of Elementary Functions; Linear Decision Diagrams; Representation of a Circuit Level by Linear Expression; Linear Decision Diagrams for Circuit Representation; Technique for Manipulating the Coefficients; Linear Word-level Sum-of-Products Expressions; Linear Word-level Reed-Muller Expressions; Summary; Problems; Further Reading; References; EVENT-DRIVEN ANALYSIS OF HYPERCUBE-LIKE TOPOLOGY; Formal Definition of Change in a Binary System; Computing Boolean Differences; Models of Logic Networks in Terms of Change; Matrix Models of Change; Models of Directed Changes in Algebraic Form; Local Computation Via Partial Boolean Difference; Generating Reed-Muller Expressions by Logic Taylor Series; Arithmetic Analogs of Boolean Differences and Logic Taylor Expansion; Summary; Problems; Further Reading; References; NANODIMENSIONAL MULTIVALUED CIRCUITS; Introduction to Multivalued Logic; Spectral Technique; Multivalued Decision Trees and Decision Diagrams; Concept of Change in Multivalued Circuits; Generation of Reed-Muller Expressions; Linear Word-level Expressions of Multivalued Functions; Linear Nonarithmetic Word-level Representation of Multivalued Functions; Summary; Problems; Further Reading; References; PARALLEL COMPUTATION IN NANOSPACE; Data Structures and Massive Parallel Computing; Arrays; Linear Systolic Arrays for Computing Logic Functions; Computing Reed-Muller Expressions; Computing Boolean Differences; Computing Arithmetic Expressions; Computing Walsh Expressions; Tree-Based Network for Manipulating a Switching Function; Hypercube Arrays; Summary; Problems; Further Reading; References; FAULT-TOLERANT COMPUTATION; Definitions; Probabilistic Behavior of Nanodevices; Neural Networks; Stochastic Computing; Von Neumann's Model on Reliable Computation with Unreliable Components; Faulty Hypercube-Like Computing Structures; Summary; Further Reading; References; INFORMATION MEASURES IN NANODIMENSIONS; Information-Theoretical Measures at Various Levels of Design in Nanodimensions; Information-Theoretical Measures in Logic Design; Information Measures of Elementary Switching Functions; Information-Theoretical Measures in Decision Trees; Information Measures in the N-Hypercube; Information-Theoretical Measures in Multivalued Functions; Summary; Problems; Further Reading; References; INDEX
• Publisher Details: Place of publication not identified : CRC Press
• Publication Date: 2017
• Extent: 1 online resource (488 pages), (47 illustrations)
• Subjects: 621.381; Integrated circuits; Logic design; Molecular electronics; Nanotechnology; Logic Design; TECHNOLOGY & ENGINEERING -- Electronics -- Microelectronics; TECHNOLOGY & ENGINEERING -- Electronics -- Digital; Integrated circuits; Logic design; Molecular electronics; Nanotechnology; Electronic books
• Languages: English
• ISBNs: 9781351836326; 1351836323
• Access Rights: Legal Deposit; Only available on premises controlled by the deposit library and to one user at any one time; The Legal Deposit Libraries (Non-Print Works) Regulations (UK).
• Access Usage: Restricted: Printing from this resource is governed by The Legal Deposit Libraries (Non-Print Works) Regulations (UK) and UK copyright law currently in force.